A Low-cost Reconfigurable Field-programmable Gate Array Based Three-phase Shunt Active Power Filter for Current Harmonic Elimination and Power Factor Constraints

Abstract

Non-linear loads, such as switched mode power supply, adjustable-speed drives, arc furnaces, etc., result in deterioration of power quality in terms of current harmonics and reactive power demand. Shunt active power filters are widely used to compensate the current harmonics, thereby improving power quality. Digital signal processors and microcontroller units used in digital control of shunt active power filters are constrained by a complex algorithm structure, adaptability, accuracy, the absence of feedback loop delays, and larger execution time. Shunt active power filters require a faster computation update rate to maintain the closed-loop bandwidth, accurate sensing of voltage and current, proper estimation of parameters, and a high frequency pulse-width modulation. In this article, a low-cost single all-on-chip field-programmable gate array implements the digital control of a three-phase shunt active power filter. This proposed implementation scheme has much less execution time and boosts the overall performance of the system. All required tasks of a typical shunt active power filter are implemented with a low-cost single all-on chip field-programmable gate array module that provides freedom to reconfigure for any other applications. Additional features, such as anti-windup, over-sampling, and time multiplexing, are also added to improve the overall performance. The proposed system is designed to meet IEEE 519 and IEC EN 61000-3 recommendations in terms of harmonic elimination and unity power factor requirements. The entire algorithm is coded, processed, and simulated using Xilinx 12.1 ISE Suite to estimate the advantages of the proposed system. This code is also defused on the low-cost single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype, and experimental results obtained match with simulated counterparts. The proposed control scheme for the shunt active power filter results in reduces current harmonics under dynamic and steady-state operating conditions.

Keywords:

• shunt active power filter
• digital control
• field-programmable gate array
• harmonic compensation
• reactive power
• synchronous reference frame

Additional information

Notes on contributors

Charles Siluvaimuthu

Charles Siluvaimuthu received his B.E. (2004) in electrical and electronics engineering and his M.E. (2006) in power electronics and drives from Anna University, India. Currently, he is an assistant professor in the Department of Electrical and Electronics Engineering, Sri Shakthi Institute of Engineering and Technology, Coimbatore, Tamilnadu, India. He is currently working toward his Ph.D. at Anna University Chennai, India. He is a member of the IEEE. His current research interests include power electronics applications in distribution systems, real-time digital simulation and control, field-programmable gate array implementation, and active power filters for power conditioning.

Vivekanandan Chenniyappan

Vivekanandan Chenniyappan received his bachelor degree in electrical and electronics engineering and his master degree in applied electronics from Bharathiyar University in 1986 and 1988, respectively, and his Ph.D. from Anna University, Chennai, Tamilnadu, India, in 2009. Presently he is a professor and vice principal at S.N.S College of Engineering, Coimbatore, Tamilnadu, India. He is a life member of IEEE, a fellow of the Institute of Engineers (FIE), a life member in the Indian Society for Technical Education (MISTE), System Society of India (MSSI), and a member in the Association of Computer Electronics and Electrical Engineers (MACEEE). His areas of interest include sliding-mode control, digital control systems, algorithm development, and embedded systems.