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Articles

Experimental Validation of ADALINE Least Mean Square Algorithm in a Three-Phase Four-Wire DSTATCOM to Enhance Power Quality

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Pages 769-780 | Received 18 Jun 2019, Accepted 23 Aug 2020, Published online: 06 Oct 2020
 

Abstract

The requirement of a robust and adaptive control algorithm in active filters is inevitable nowadays. In this paper, an ADAptive LINEar neuron (ADALINE) based Least Mean Square (LMS) control algorithm is proposed for a three-phase-four-wire (3P4W) distribution power system under unbalanced loading conditions. The proposed controller has a unique inbuilt characteristic to extract the fundamental active positive sequence component from an unbalanced load current. Particularly, the control algorithm is intended to calculate an adaptive and suitable amplitude for the three-phase reference source currents which are used for the switching pulse generation in the subsequent steps. Moreover, the Distribution STATic COMpensator (DSTATCOM) is performed to eliminate harmonic contents of supply current and harmful excessive neutral current in the system. Further, the DC-link voltage is regulated in order to reduce the power loss across the DSTATCOM, and to attain a balanced, high-quality power availability at the Point of Common Coupling (PCC). The proposed system is accomplished in the MATLAB2014a/Simulink, and a low power rated 3P4W DSTATCOM prototype incorporating with the dSPACE1104 real-time environment to verify the proposed control algorithm.

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Notes on contributors

Trilochan Penthia

Trilochan Penthia is working in College of Electrical Engineering, Zhejiang University, Hangzhou (China) as postdoctoral fellow since May 2019. He received his B. Tech degree in Electrical Engineering from Government College of Engineering, Keonjhar (Odisha, India) in the year 2012, and M. Tech degree in Electrical Engineering from National Institute of Technology, Rourkela (India) in 2014. He did his Ph.D. as an Institute Research Scholar in the Department of Electrical Engineering at National Institute of Technology, Rourkela during the period of July 2014 to August 2018. He had worked as an Assistant professor at Electrical and Instrumentation Engineering Department, Thapar Institute of Engineering and Technology, Patiala (India) from August 2018 to April 2019. His research interests include power electronics converters, solid-state transformer, power quality, applied power electronics, and superconducting power and energy technology.

Anup Kumar Panda

Anup Kumar Panda received the B. Tech in Electrical Engineering from Sambalpur University, India, M. Tech in Power Electronics and Drives from Indian Institute of Technology, Kharagpur, India and Ph.D. from Utkal University in 1987, 1993, and 2001, respectively. In 1990, he joined as a lecturer in IGIT, Sarang, served there for 11 years and then in January 2001 joined National Institute of Technology, Rourkela as an Assistant Professor and currently continuing as a Professor HAG in the Department of Electrical Engineering, National Institute of Technology Rourkela. He has published more than 200 articles in journals and conferences. He is a Fellow of IET(UK). His research interest includes design of high-frequency power conversion circuits and applications of soft computing techniques, improvement in multi-level converter topology, power factor improvement, power-quality improvement in power system, and electric drives.

Mrutyunjaya Mangaraj

Mrutyunjaya Mangaraj received the B. Tech (Hons.) in Electrical Engineering from Berhampur University, India in 2006. He received the M. Tech in Power System Engineering from VSSUT, Burla, India in 2010. He served as Assistant professor in the Department of Electrical Engineering at NIST Berhampur, India from 2010 to 2013. He obtained Ph.D. from National Institute of Technology, Rourkela in 2018. He re-joined at NIST Berhampur for one and half years and currently continuing as an Associate Professor in the Department of Electrical & Electronics Engineering at LIET Vizianagaram. His area of research interest includes power system economics, design and modeling of d-FACTS devices with embedded controller, soft computing techniques etc.

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