Abstract
The SEPIC or Single-ended primary-inductor converter (SEPIC) via DC-DC converter can be controlled via duty cycle scheduling mechanisms. The output voltage levels of SEPIC depend upon internal components ratings and the control switch’s duty cycle, which can be intelligently controlled for context-aware circuits. The proposed DSLCADCC method uses a hybrid of Particle Swarm Optimization (PSO) with a Genetic Algorithm (GA) Model, which assists in real-time duty cycle reconfigurations. This model is supported via a customized lightweight and low-power pre-trained Q-Learning Model that continuously monitors the performance of the SEPIC circuit and performs incremental tuning of the GA & PSO Models. The Q-Learning Model estimates circuit efficiency, total harmonic distortion (THD), and power consumption & operation delay of the bioinspired SEPIC Model for retuning its performance. The model can reduce overall power consumption by 18.5% and improve the efficiency of SEPIC circuits by 15.4% while maintaining high operating speed and similar THD performance compared with its non-reconfigurable counterparts. This high performance enhances the capability of the proposed model in terms of deployment for a wide variety of circuits that are built with multiple in-circuit components and require different voltages for component-level operations.
DISCLOSURE STATEMENT
No potential conflict of interest was reported by the author(s).
Additional information
Notes on contributors
Shreyas Rajendra Hole
Shreyas Rajendra Hole is a Ph.D. student in the School of Electronics Engineering (SENSE), Vellore Institute of Technology (VIT), Amaravati Campus, Andhra Pradesh. He received a B.E. degree in Electronics and Telecommunication Engineering from Sant Gadge Baba Maharaj Amravati University in 2015, and an M.E. degree in Electronics & Communication Engineering from PRMIT&R, Badnera 2019, respectively. His area of interest includes Renewable Energy, Machine learning, and DC-DC Converter.
Agam Das Goswami
Agam Das Goswami is presently working as Assistant Professor (Sr. Grade) in School of Electronics Engineering (SENSE), Vellore Institute of Technology (VIT), Amaravati Campus Andhra Pradesh. He received B.E. degree in Electronics and Communication Engineering from Pt. Ravi Shankar Shukla University Raipur in 2006, the M.E. degree in Communication engineering from SSCET Bhilai, 2010, respectively, and a Ph.D. degree from National Institute of Technology (NIT Rourkela), Orissa, India in 2017. His area of interest includes Power Electronics, Machine learning, and multi-point stochastic simulation.