Improved gate bias stressing stability of IGZO thin film transistors using high-k compounded ZrO₂/HfO₂ nanolaminate as gate dielectric

Abstract

The high-k compounded ZrO₂/HfO₂ nanolaminate gate dielectric is deposited by atomic layer deposition (ALD). And the high-performance InGaZnO (IGZO) thin film transistors (TFTs) are fabricated with the ZrO₂/HfO₂ nanolaminate gate dielectric. It is found that the ZrO₂/HfO₂ stacked dielectric presents the smaller root-mean-squared (RMS) and higher breakdown electric field of 6 MV/cm. Furthermore, the TFTs with ZrO₂/HfO₂ nanolaminate shows excellent properties, such as an increased field-effect mobility of 16.7 cm²/Vs, a deceased subthreshold swing (SS) of 0.64 V/decade, a higher I_on/I_off current ratio of 10⁸, and a threshold voltage shift (ΔV_th) of 0.78 V, 0.32V after gate-bias stress at +5V, -5V for 3600 s, respectively, which are superior compared to TFTs with single ZrO₂ dielectric. Thus, the high mobility and high stability TFTs could be regarded as a good candidate for the active matrix organic light emitting diodes (AMOLED) driving.

Keywords:

• thin film transistors
• ZrO2/HfO2 stacked dielectric
• stressing stability
• subthreshold swing

Acknowledgment

This work is supported by the Shanghai Sailing Program (17YF1406300), National Key Basic Research Program of China (2015CB655005), Science and Technology Commission of Shanghai Municipality Program (17DZ2281700), the Natural Science Foundation of China (61774100), and Shanghai Software and integrated circuit industry development special funds (170401).