Forecasting the Effects of Electromagnetic Fault Injections on Embedded Cryptosystems

ABSTRACT

This work deals with the electromagnetic pulses (EMP) injection of transient faults into embedded cryptosystems. The purpose of this study is to deepen the understanding of the interaction of an electromagnetic (EM) field and a logic circuit (ASIC or FPGA). In this direction, a sign-off power analysis and a voltage (IR) drop analysis can be useful to localize possible circuit weaknesses and identify the most vulnerable regions to EMP attacks. The preliminary results of a sign-off power analysis conducted on a real circuit are provided and discussed. The long-term objective is the development of a model able to predict the effects of an EMP on a cryptosystem.

KEYWORDS:

• ASIC
• DES
• electromagnetic fault injection
• electromagnetic pulse
• IR-drop
• sign-off analysis

Additional information

Notes on contributors

Diego Alberto

Diego Alberto received a MSc Degree in Telecommunication Engineering from the Politecnico di Torino, Italy, in 2004, a BSc in Physics from the Università di Torino, Italy, in 2007, and a European PhD Degree in Electronics and Communication Engineering from the Politecnico di Torino in 2011. After one year spent as a post-doc at the Electronics Department of the Politecnico di Torino, he is currently a post-doc researcher at the Techniques of Informatics and Microelectronics for Integrated Systems Architecture (TIMA) Laboratory, Grenoble, France. His major interests include the application of the digital signal processing for real-time and off-line signal treatment.

Paolo Maistri

Paolo Maistri received a MSc Degree in Electrical Engineering and Computer Science from the University of Illinois, Chicago (UIC) in 2001 and a degree in computer engineering and a PhD Degree in Computer Engineering from Politecnico di Milano, Italy, in 2001 and 2006, respectively. After a few years as a post-doctoral researcher, he is currently a CNRS researcher at the Techniques of Informatics and Microelectronics for Integrated Systems Architecture (TIMA) Laboratory, Grenoble, France. His major interests include efficient implementations of cryptographic systems, implementations of fault attacks, and the development of efficient and effective countermeasures against DFA, with particular focus on the Advanced Encryption Standard.

Régis Leveugle

Régis Leveugle received a PhD Degree in Microelectronics from the National Polytechnical Institute of Grenoble (INPG), Grenoble, France, in 1990. He is currently a Professor at Grenoble INP and an associate director of TIMA Laboratory. His main interests include computer architecture, VLSI design methods, and CAD tools, fault tolerant architectures, secure circuits, concurrent checking, and dependability analysis. He has authored or co-authored more than 200 scientific papers and served as a reviewer for numerous journals and conferences. He has also served on numerous program and organization committees of international conferences.