A cognitive digital twin for process chain anomaly detection and bottleneck analysis

ABSTRACT

Bottleneck detection and management plays a significant role in the context of Industry 4.0, wherein process chains have become more intricate. The dynamic nature of process chains shifts the bottleneck location, which requires an integrated methodology capable of identifying current as well as predicting future bottlenecks. The paper proposes a cognitive digital twin (CDT) with a novel explainable artificial intelligence (XAI) model. The proposed CDT is capable of (i) detecting existing bottlenecks, (ii) detecting data anomalies and process chain anomalies (iii) estimating shifting bottlenecks due to anomalies, (iv) predicting near future bottlenecks, and (v) the XAI model supports operational and strategic decision making. The usefulness of proposed CDT is demonstrated and validated experimentally on an industry 4.0 compliant learning factory. The proposed novel CDT effectively addresses the process chain bottlenecks (existing, shifting, and future) while the XAI model enhances transparency and trustworthiness for practical implementation.

Graphical Abstract

KEYWORDS:

• Cognitive digital twin
• explainable AI
• bottleneck analysis
• anomaly detection

Disclosure statement

No potential conflict of interest was reported by the author(s).

Data availability statement

The datasets generated and analyzed during the current study are available from the corresponding author on reasonable request.

Additional information

Funding

The authors did not receive support from any organization for the submitted work.

Notes on contributors

Suveg V. Iyer

Suveg V. Iyer is a PhD research scholar in Mechanical Engineering at Birla Institute of Technology and Science, Pilani (BITS Pilani), Pilani, Rajasthan, India. He holds an undergraduate degree in mechatronics engineering and a master’s degree in industrial automation and robotics. His research interest lies in the areas of digital twins, digitalization, robotics, and Industrial Engineering.

Kuldip Singh Sangwan

Kuldip Singh Sangwan is a Senior Professor of Mechanical Engineering at Birla Institute of Technology and Science, Pilani (BITS Pilani), Pilani, Rajasthan, India. He is the recipient of the prestigious Shri B. K. Birla and Shrimati Sarala Birla Chair Professorship. He has published four books, more than 25 book chapters and more than 190 papers in international journals of repute. He had received projects worth more than 6 crore INR from international agencies, industry, and Indian government agencies. He has an active collaboration with TU Braunschweig, Germany for the last 13 years. Prof. Sangwan is a fellow of the Institution of Engineers (India), member of the International Association of Learning Factories, and senior member of Indian Institute of Industrial Engineering. He is in the ‘top 2% world scientists’ list curated by Stanford University researchers.

Dhiraj

Dhiraj is a Principal Scientist at CSIR-Central Electronics Engineering Research Institute (CSIR-CEERI), Pilani, Rajasthan, India. He also holds an honorary position of Associate Professor (Engineering Sciences) at the Academy of Scientific and Innovative Research (AcSIR), India. He has his Ph.D. in the domain of Evolutionary Algorithms and their applications. He was a Visiting Researcher at the University of Maribor, Slovenia, in 2015 and at Hiroshima University in 2017. He has executed multiple Research and Development projects as Project Coordinator/Principal Investigator/Co-Principal Investigator/Team Member - Funded by leading industries like Samsung, Krystalvision, etc., and Government Agencies like CSIR, DST, etc. He has published more than 60 research articles in journals, conferences, and book chapters.