ABSTRACT
Adder circuits are the basis for other arithmetic operations and they are considered as being one of the main circuits in creating complex hardware; therefore, enhancing their performance is very significant. In the last few years one of the main aspects that researchers have focused upon is the designing of low power circuits. Using reversible logic in the designing of circuits can reduce power dissipation and power consumption; in addition, using the ternary logic lead to better performance, reduce power consumption and production cost in reversible circuits. In this paper, quantum reversible ternary adder circuits which have a better performance as compared to the previous designs have been introduced. We used Ternary Muthukrishnan–Stroud, Feynman, Toffoli and C2 NOT gates for the proposed designs. All the scales used are based on the Nanometric area.
Disclosure statement
No potential conflict of interest was reported by the authors.