An efficient approach to mapping large anns onto fixed systolic architectures

References

• Barua , S. 1993 . Proc. of the SPIE 1773 . Optical and systolic implementation of an artificial neural networks . 1993 . pp. 125 – 129 .
   Google Scholar
• Bekakos , M. P. and Pramataris , K. C. July 1996 . Systolic array exploitation of a neural network inherent parallelism solving the nearest-neighbour problem July , AUEB INFO TR: 3
   Google Scholar
• 1988 . Proc. Supercomputing '88 . iWarp: An integrated solution to high-speed parallel computing . 1988 , Orlando, FL. pp. 330 – 339 . IEEE Computer Society .
   Google Scholar
• Bose , N. K. and Liang , P. 1996 . “ Neural network fundamentals with graphs ” . In Algorithms and Applications , McGraw-Hill, Inc .
   Google Scholar
• Chin , G. , Grajski , K. A. , Chen , C. , Kuszmaul , C. and Tomboulian , S. 1990 . Proc. Internat. Joint Conf on Neural Networks . Systolic array implementations of neural nets on the MasPar MP - 1 massively parallel processor . 1990 , San Diego, CA. Vol. II , pp. 169 – 173 .
   Google Scholar
• Chung , H-J. , Yoon , H. and Maeng , S. R. 1991/92 . A systolic array exploiting the inherent parallelisms of artificial neural networks . Microprocessing and Microprogramming , 33 : 145 – 159 .
   Google Scholar
• Elmasry , M. I. , ed. 1994 . VLSI Artificial Neural Networks Engineering , MA : Kluwer Academic .
   Google Scholar
• Kung , H. T. 1982 . Why systolic architectures? IEEE Comput. 37 – 46 .
   Google Scholar
• Kung , S. Y. and Hwang , J. N. 1988 . Proc. IEEE Inter. Conf. on Neural Networks . Parallel architectures for artificial neural nets . 1988 , San Diego, CA. Vol. II , pp. 165 – 172 .
   Google Scholar
• Lehmann , C. , Virredaz , M. and Blayo , F. 1993 . A generic systolic array building block for neural network with on-chip learning . IEEE Trans. Neural Networks , 4 ( 3 ) : 400 – 407 .
   PubMed Web of Science ®Google Scholar
• Lippman , R. P. 1987 . An introduction to computing with neural nets . IEEE ASSP Magazine , April : 4 – 22 .
   Google Scholar
• Millan , J. R. and Bofill , P. 1989 . Learning by back-propagation: A systolic algorithm and its transputer implementation . Neural Networks , 3 119 – 137 .
   Google Scholar
• Mann , R. and Haykin , S. 1990 . Proc. Internat. Joint Conf. on Neural Networks . A parallel implementation of Kohonen feature maps on the Wrap systolic computer . 1990 , Washington, DC. Vol. II , pp. 84 – 87 .
   Google Scholar
• Simpson , P. K. 1990 . Artificial neural systems, foundations, paradigms, applications, and implementations , Pergamon Press .
   Google Scholar
• Wasserman , P. D. 1993 . “ Advanced Methods in Neural Computing ” . In Van Nostrand Reinhold New York
   Google Scholar
• White , B. A. and Elmasry , M. I. 1992 . The digi-neocognitron: a digital neocbgnitron neural network model for VLSI . IEEE Trans, on Neural Networks , 3 ( 1 ) : 73 – 85 .
   PubMed Web of Science ®Google Scholar
• Zhang , D. 1996 . Neural Networks System Design Methodology , Tsinghua University Press .
   Google Scholar
• Zhang , D. and Elmasry , M. I. 1996 . VLSI compressor design for digital neural network implementation . IEEE Transactions on Very Large Scale Integration (VLSI) Systems , September in print
   Google Scholar
• Zhang , D. and Elmasry , M. I. 1996 . Mapping neural networks onto systolic arrays, Neural . Parallel and Scientific Computations , 4 341 – 352 .
   Google Scholar