References
- Bhattacharya, S., Jangkrajarng, N., & Shi, C. (2006). Multilevel symmetry-constraint generation for retargeting large analog layouts. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(6), 945–960. doi:10.1109/TCAD.2005.855982
- Cadence Inc. (2004). Neocircuit user guide. San Jose, CA: Author.
- Francken, K., & Gielen, G. (1999, March). Methodology for analog technology porting including performance tuning. In Proceedings of the 1999 IEEE international symposium on circuits and systems, 1999. ISCAS ’99, Orlando, FL. IEEE. doi:10.1109/ISCAS.1999.777895
- Gielen, G., & Rutenbar, R. (2000). Computer aided design of analog and mixed-signal integrated circuits. Proceedings of the IEEE, 88(12), 1825–1854. doi:10.1109/5.899053
- Hammouda, S., Kessouky, M., Tawfik, M., & Badawy, W. (2004, July). A fully auto-mated approach for analog circuit reuse. In Proceedings of 4th IEEE international workshop on system-on-chip for real-time applications, 2004, Banff. IEEE. doi:10.1109/IWSOC.2004.1319886
- Li, Z., & Fiez, T. S. (2007). A 14-bit continuous-time delta-sigma A/D modulator with 2.5 MHz signal bandwidth. IEEE Journal of Solid State Circuits, 42, 1873–1883. doi:10.1109/JSSC.2007.903086
- Martens, E., & Gielen, G. (2006). Analyzing continuous-time ∆Σ modulators with generic behavioral models. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(5), 924–932. doi:10.1109/TCAD.2005.855970
- Norsworthy, S., Schreier, R., & Temes, G. (1996). Delta-Sigma data converters: Theory, design, and simulation. New York, NY: IEEE Press.
- Phelps, R., Krasnicki, M., Rutenbar, R., Carley, L., & Hellums, J. (2000a, June). A case study of synthesis for industrial-scale analog IP: Redesign of the equalizer/filter frontend for an ADSL CODEC. In Proceedings of IEEE design automation conference, Los Angeles, CA. IEEE Computer Society, ACM. doi:10.1109/DAC.2000.855265
- Phelps, R., Krasnicki, M., Rutenbar, R., Carley, L., & Hellums, J. (2000b). Anaconda: Simulation-based synthesis of analog circuits via stochastic pattern search. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 19(6), 703–717. doi:10.1109/43.848091
- Ruiz-Amaya, J., Roas, J., Medeiro, F., Fernandez, F., Rio, R., Perez-Verdu, D., & Rodriguez-Vazquez, A. (2005). High-level synthesis of switched-capacitor, switched-current and continuous-time Sigma-Delta modulators using SIMULINK-based time-domain behavioral models. IEEE Transactions on Circuits and Systems I: Regular Papers, 52(9), 1795–1810. doi:10.1109/TCSI.2005.852479
- Seobin, J., Jiho, L., & Jaeha, K. (2014). Variability-aware discrete optimization for analog circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 33, 1117–1130. doi:10.1109/TCAD.2014.2313452
- Singh, A., Ragab, K., Lok, M., Caramanis, C., & Orshansky, M. (2012). Predictable equation-based analog optimization based on explicit capture of modeling error statistics. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31, 1485–1498. doi:10.1109/TCAD.2012.2199115
- Stehr, G., Pronath, M., Schenkel, F., Graeb, H., & Antreich, K. (2003, November). Initial sizing of analog integrated circuits by centering within topology-given implicit specifications. In Proceedings of international conference on computer aided design, 2003. ICCAD-2003, San Jose, CA. IEEE Computer Society, ACM. doi:10.1109/ICCAD.2003.159696
- Synopsys Inc. (2004). Synopsys circuit explorer training manual. Mountain View, CA: Author.
- Tang, H., Zhang, H., & Doboli, A. (2006). Refinement based synthesis of continuous-time analog filters through successive domain pruning, plateau search and adaptive sampling. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(8), 1421–1440. doi:10.1109/TCAD.2005.857378
- Webb, M., & Tang, H. (2008, May 23–26). Analog design retargeting by design knowledge reuse and circuit synthesis. In Proceedings of IEEE international symposium on circuits and systems (ISCAS’08), Seattle, WA (pp. 892–895). Piscataway, NJ: IEEE.
- Webb, M., & Tang, H. (2009). A low-power and low-complexity continuous-time Gm-C based Delta-Sigma modulator for WCDMA/UMTS. International Journal of Electronics, 96(6), 585–602. doi:10.1080/00207210902738109
- Zhang, Y., & Leuciuc, A. (2002). A 1.8 V continuous-time Delta-Sigma modulator with 2.5 MHz bandwidth. In Proceedings of MWSCAS, Tulsa, OK (Vol. I, pp. 140–143). Piscataway, NJ: IEEE.