135
Views
5
CrossRef citations to date
0
Altmetric
Articles

HTM: a new hierarchical interconnection network for future generation parallel computers

, , &

References

  • B. S. P. Mishra, and S. Dehuri, Parallel computing environments: A review, IETE Tech. Rev., Vol. 28, no. 3, pp. 240–7, Jun. 2011.
  • Available: http://top500.org/blog/lists/2013/06/press-release/
  • V. Puente, J. A. Gregorio, R. Beivide, and F. Vallejo, “A low cost fault tolerant packet routing for parallel computers,” in Proceedings of the 17th IEEE/ACM International Parallel and Distributed Processing Symposium (IPDPS), Nice, France, 2003, 8 pp.
  • P. Beckman, “Looking toward exascale computing,” in Keynote Spech. International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT’08), Dunedin, 2008, 3 pp.
  • M. Abd-El-Barr, and T. F. Al-Somani, “Topological properties of hierarchical interconnection networks: A review and comparison,” J. Electr. Comput. Eng., Vol. 2011, pp. 1–12, Jan. 2011.
  • P. L. Lai, H. C. Hsu, C. H. Tsai, and I. A. Stewart, “A class of hierarchical graphs as topologies for interconnection networks,” Theor. Comput. Sci., Elsevier, Vol. 411, pp. 2912–24, Jun. 2010.
  • Y. Liu, C. Li, and J. Han, “RTTM: A new hierarchical interconnection network for massively parallel computing,” in Proceedings of the HPCA, Shanghai, China, 2010, pp. 264–71.
  • M. M. Hafizur Rahman, A. Shah, and Y. Inoguchi, “On dynamic communication performance of a hierarchical 3D-mesh network,” in Proceedings of the NPC, Gwangju, 2012, pp. 179–86.
  • L. M. Ni, and P. K. McKinley, “A survey of wormhole routing techniques in direct networks,” IEEE Comput., Vol. 26, no. 2, pp. 62–76, Feb. 1993.
  • J. Wang, “System-level buffer allocation for application specific network-on-chip with wormhole routing,” IETE Tech. Rev., Vol. 29, no. 6, pp. 482–91, Dec. 2012.
  • P. Lotfi-Kamran, A. M. Rahmani, M. Daneshtalab, A. Afzali-Kusha, and Z. Navabi, “EDXY – A low cost congestion-aware routing algorithm for network-on-chips,” J. Syst. Architect., Vol. 56, no. 7, pp. 256–64, Jul. 2010.
  • W. J. Dally, “Virtual-channel flow control,” IEEE Trans. Parallel Distrib. Syst., Vol. 3, no. 2, pp. 194–205, Mar. 1992.
  • Y. Xu, B. Zhao, Y. Zhang, and J. Yang, “Simple virtual channel allocation for high throughput and high frequency on-chip routers,” in Proceedings of the 16th International Symposium on High Performance Computer Architecture (HPCA), Bangalore, 2010, pp. 1–11.
  • M. M. Hafizur Rahman, A. Shah, M. Fukushi, and Y. Inoguchi, “Hierarchical tori connected mesh network,” in Proceedings of the 13th ICCSA, Vietnam, 2013, pp. 197–210.
  • R. Holsmark, S. Kumar, M. Palesi, and A. Mekia, “HiRA: A methodology for deadlock free routing in hierarchical networks on chip,” in Proceedings of the 3rd ACM/IEEE NOCS, San Diego, CA, 2009, pp. 2–11.
  • W. J. Dally, and C. L. Seitz, “A deadlock free message routing in multiprocessor interconnection networks,” IEEE Trans. Comput., Vol. C36, no. 5, pp. 547–53, May 1987.
  • D. Xiang, Y. Zhang, and Y. Pan, “Practical deadlock-free fault-tolerant routing in meshes based on the planar network fault model,” IEEE Trans. Comput., Vol. 58, no. 5, pp. 620–633, May 2009.
  • M. Koibuchi, K. Anjo, Y. Yamada, A. Jouraku, and H. Amano, “A simple data transfer technique using local address for networks-on-chips,” IEEE Trans. Parallel Distrib. Syst., Vol. 17, no. 12, pp. 1425–37, Dec. 2006.
  • J. M. Kumar, and L. M. Patnaik, “Extended hypercube: A hierarchical interconnection network of hypercube,” IEEE Trans. Parallel Distrib. Syst., Vol. 3, no. 1, pp. 45–57, 1992.
  • H. H. Najaf-abadi, and H. Sarbazi Azad, “The effects of adaptivity on the performance of the OTIS-hypercube under different traffic patterns,” in Proceedings of IFIP International Conference NPC2004, Wuhan, China, 2004, pp. 390–8.
  • G. F. Pfister, and V. A. Norton, “Hot spot contention and combining in multistage interconnection networks,” IEEE Trans. Comput., Vol. 34, no. 10, pp. 943–8, Oct. 1985.
  • A. Bhatele, N. Jain, W. D. Gropp, and L. V. Kale, “Avoiding hot-spots on two-level direct networks,” in Proceedings of International Conference for High Performance Computing, Networking, Storage and Analysis, Seatle, WA, 2011, pp. 1–11.
  • A. M. Rahmani, A. Afzali-Kusha, and M. Pedram, “NED: A novel synthetic traffic pattern for power/performance analysis of network-on-chips using negative exponential distribution,” J. Low Power Electron., Vol. 5, no. 3, pp. 396–405, Oct. 2009.
  • M. M. Hafizur Rahman, Y. Inoguchi, Y. Sato, Y. Miura, and S. Horiguchi, “Dynamic communication performance of the TESH network under nonuniform traffic patterns,” J. Networks, Vol. 4, no. 10, pp. 941–51, Dec. 2009.
  • L. Schwiebert, and R. Bell, “Performance tuning of adaptive wormhole routing through selection function choice,” J. Parallel Distrib. Comput., Vol. 62, no. 7, pp. 1121–41, Jul. 2002.
  • M. M. Hafizur Rahman, Y. Sato, and Y. Inoguchi, “High performance hierarchical torus network under adverse traffic patterns,” J. Networks, Vol. 7, no. 3, pp. 456–67, Mar. 2012.
  • L. Xiao, and K. Wang, “Reliable opto-electronic hybrid interconnection network,” in Proceedings of the 9th I-SPAN, Sydney, NSW, 2008, pp. 239–44.
  • Satwant Kaur, “On-chip networks!,” IETE Tech. Rev., Vol. 30, no. 3, pp. 168–72, Jun. 2013.
  • M. P. Kumar, S. Murali, and K. Veezhinathan, “Network-on-chips on 3-D ICs: Past, present and future,” IETE Tech. Rev., Vol. 29, no. 4, pp. 168–72, Aug. 2012.

Reprints and Corporate Permissions

Please note: Selecting permissions does not provide access to the full text of the article, please see our help page How do I view content?

To request a reprint or corporate permissions for this article, please click on the relevant link below:

Academic Permissions

Please note: Selecting permissions does not provide access to the full text of the article, please see our help page How do I view content?

Obtain permissions instantly via Rightslink by clicking on the button below:

If you are unable to obtain permissions via Rightslink, please complete and submit this Permissions form. For more information, please visit our Permissions help page.