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IETE Journal of Research Volume 22, 1976 - Issue 7

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Original Articles

A Programmable Fault Testing Equipment for Combinational Networks

Pradip K. SrimaniInstitute of Radio Physics and Electronics, University of Calcutta, 92, Acharya Prafulla Chandra Road, Calcutta, 700009.

(Grad. Member)

Pages 486-491 | Received 16 May 1975, Published online: 11 Jul 2015

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https://doi.org/10.1080/03772063.1976.11451084

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REFERENCES

KOHAVI (I) and KOHAVI (Z). Detection of multiple faults in combinational logic networks. IEEE Trans. C-21, 6; 1972; 556–568.
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MARINOS (PN). Derivation of minimal complete sets of test input sequences. Ibid. C-20, 1; 1971; 25–32.
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Du (MW) and WEISS (CD). Multiple fault detection in combinational circuits: Algorithms and computational results. Ibid. C-22, 3; 1973; 225–229.
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AKERS (SB Jr.) Universal test sets for logic networks. Ibid. C-22, 9; 1973; 835–839.
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HENNI (FC). Finite state models for logical machines. 1968. John Wiley and Sons. New York. P 199–222.
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