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Original Articles

Design of NAND/NOR Logic Networks—A New Approach

Pages 303-306 | Received 26 Aug 1976, Published online: 11 Jul 2015

REFERENCES

  • Hart (K) and Slob (A). Integrated Injection Logic: A New Approach to LSI. IEEE J. Solid-State Circuits. SC-7, 1972; 346–351.
  • Muroga (S) and Lai (HC). Minimization of Logic Net works under a Generalized Cost Function. IEEE Trans. C-25, 1976; 893–907.
  • Zissos (D). Logic Design Algorithms. 1972. Oxford Univ. Press.
  • Dietmeyer (DL) and Su (YH). Logic Design Automation of Fan-in Limited NAND Networks. IEEE Trans. C-18, 1969; 11–22.
  • Su (YH) and Nam (CW). Computer-Aided Synthesis of Multiple Output Multi-Level NAND Networks with Fan-in and Fan-out Constraints. IEEE Trans. C-202, 1971; 1445–1455.
  • Masset (GJ) and Tosser (AJ). Minimization of NAND-NOR Networks by Factoring. Int. J. Electronics. 41, 6; 1976; 525–556.
  • Chinal (J). Design Methods for Digital Systems. 1973. Springer-Verlag, NY. P 158–167.
  • Om Vikas. Combine Multichart Karnaugh Maps into Single, Easy-to-Handle Versions. Electronic Design. 15, 1975 July 19; 70.

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