REFERENCES
- S M Sze, Physics of Semiconductor Devices, Wiley, 1982.
- S M Sze, VLSI Technology, McGraw-Hill, 1983.
- Special issue on VLSI, IEEE J Solid State Circuits, vol 14, April 1979.
- Special issue on VLSI Technology, IEEE Trans ED, Feb 1985.
- R C Eden et al, The prospects for ultra high speed VLSI GaAs Digital Logic, JSSC, vol SC-14, p 221, April 1979.
- Joint Special issue on GaAs IC's, IEEE Trans Microwave Theory and Techniques, vol MTT-30, July 1982.
- Special issue on heterostructure Transistors, Trans ED, vol 36, Oct 1989.
- R C Eden & B M Welch, Ultra High-Speed GaAs VLSI-Approaches, Potential and Progress, VLSI Electronics, Microstructure Science, (N G Einspruch, Ed) vol 3, p 109, Academic Press, 1982.
- J V Dilorenzo & D D Khandenwal, GaAs FET Principles and Technology, Artech House, 1982.
- R S Pengelly, Microwave Field Effect Transistor-Theory, Design and Application, John Wiley & Sons, 1982.
- R L Van Tuyl et al, A manufacturing process for analog and digital gallium arsenide integrated circuits, IEEE-ED, vol ED-29, p 1031, July 1982.
- M Abe et al. New technology towards GaAs LSI/VLSI for computer applications, Ibid, p 1088.
- M Abe et al, GaAs VLSI technology for high speed computers, in VLSI electronics: Microstructure Science, vol 11, GaAs Microelectronics, Academic, New York, 1985.
- D Bhattacharya, GaAs digital integrated circuits, Bulletin of Materials, March 1990.
- R Yamamoto et al, Design and fabrication of depletion GaAs LSI high speed adder, JSSC, vol SC-18, pp 592–599, 1983.
- Y Nakayama et al, A GaAs 16 × 16 bit parallel multiplier, Ibid, pp 599–603.
- Tho Truong Vu et al. Multiple input and output OR/AND circuits for VLSI GaAs ICs, IEEE Trans, ED-34, pp 1631–1940, Aug 1987.
- Long Yang et al, High speed dynamic domino circuit implemented with GaAs MESFET's JSSC, vol SC-22, pp 874–879, Oct 1987.
- Tho T Vu, Science coupled GaAs mesfet logic circuits, JSSC, vol SC-23. PP 267–279, Feb 1988.
- M Passlack et al, Theoretical evaluation of a novel design for Digital GaAs ICs, JSSC, vol SC-23, pp 1249–1256, Oct 1988.
- D Etienne et al, 2.5ns 40mW 4×4 GaAs two's complement multiplier, JSSC, pp 409–414, June 1987.
- M Madhihian et al, Application of AlGaAs/GaAs HBTs to high speed CML logic family fabrication, IEEE Trans, vol ED-36, pp 625–630, April, 1990.
- M Rochi et al, A 12 GHz frequency synthesizer using a custom design divide by 20/21/22/23/24 GaAs circuits, JSSC, vol SC-20, pp 1194–1199, 1985.
- M Ohhata et al, A 4.5 GHz GaAs dual modulas prescaler IC- IEEE Trans MTT, vol 36, pp 158–160, 1988.
- M Kane et al, 1.5 GHz programmable divide by N GaAs MESFET IC counter compatible with ECL logic levels, JSSC, pp 480–484, Apr 1988.
- R V Gauthier, 150 MOP's GaAs 8 bit slice processor, JSSC, vol SC-23, pp 1195–1202, Oct 1988.
- A E Geissbcrger et al, Fabrication performance and yield of a combined limiting amplifier and dual modulus prescaler GaAs IC chip, IEEE Trans MTT; vol 36, pp 1706–1713, 1988.
- Bruce Cheney et at, 2 Gb/s GaAs 16/8 bit multiplexer demultiplexer pair design and test, JSSC, vol SC-24, pp 463–466, April 1989.
- Philip J Smith, GaAs, GaAs buffer stores for Gb/s optical fibre transmisrion systems, JSSC, vol SC-24, pp 585–591, June 1989.
- H P Singh et al, GaAs prescalers and counters for fast settling frequency synthesis, JSSC, vol SC-25, p 237, Feb 1990.
- Yasuo Ikawa et al, A lK-gate array, JSSC, vol SC-19, pp 721–728, October 1984.
- Robert N Deming et al, A gallium arsenide configurable cell array using buffered FET logic, JSSC, vol SC-19, pp 728–738, Oct 1984.
- N Toyoda et al, A 2K-gatc GaAs array with WN gate self-alignment process, JSSC, vol SC-20, p 1043, Oct 1985.
- Tho T Vu et al, Low power 2K cell Schottky diode FET gate array and direct coupled FET logic using GaAs self-aligned enhancement/depletion mode MESFET's JSSC, pp 224–238, Feb 1988.
- K Kiyoshi et al, 40ps HEMT 4. 1K gate array, JSSC, pp 485–489, April 1988.
- A Peczalski et al, 6K gate array with fully functional LSI personalization, JSSC, pp 581–590, April 1988.
- Guy Schou et al. Fully ECL compatible GaAs standard cell library for MSI circuits based on buffered FET logic, JSSC, pp 676–680, June 1988.
- Masayuki et al, 30ps 7.5 GHz 250 gate GaAs mesfet macrocell array using three level series gate low power source coupled logic, JSSC, pp 1265–1270, Oct 1989.
- N Yokoyama et at, GaAs IK Static RAM using tungsten silicide gate self-aligned technology, JSSC, vol SC-18, p 520, Oct 1983.
- N Yokoyama et al, A GaAs IK static RAM using tungsten silicide gate self-aligned technology, JSSC, vol SC-16, pp 550–524, Oct 84.
- K Azai et al, GaAs IK bit static RAM with self-aligned technology, JSSC, vol SC-19, pp 260–262, Apr 1984.
- M Ino et al, Design of GaAs IK bit static RAM, IEEE Trans, vol ED-31, pp 1139–1144, Sept 1984.
- M Hirayama et al, A GaAs 4K bit SRAM with direct coupled FET logic, JSSC, vol SC-19, pp 716–720, Oct 1984.
- N Yokoyama et al, A 3ns GaAs 4K × 1 static RAM, IEEE Trans, vol ED-32, pp 1797–1802, Sept 1985.
- P O Connor et al, A high speed GaAs IK static random access memory, JSSC, vol SC-20 pp 1080–1082, Oct 1985.
- S Takano et at, A GaAs 16K bit static RAM with a shallow recessed gate structure FET, IEEE Trans, vol ED-32, pp 1135–1139, 1985.
- M Hirayama et al, A GaAs 16K bit static RAM using dislocation free crystal, IEEE Trans, vol ED-33, pp 104–110, Jan 1986.
- H Sheng et al, A high speed 1Kbit high electron mobility transistor static RAM, IEEE Trans, vol ED-34, pp 1670–1675, Aug 87, also JSSC, Oct 1986.
- ? Nishinchi et al, A subnanosecond HEMT IK bit static RAM, JSSC, p 869, Oct 1986.
- W V McLevige et al. An ECL-compatible GaAs MESFET- 1-Kbit static RAM, JSSC, vol SC-22, p 262, Apr 1987.
- S Takano et al, A GaAs 16K SRAM with a single IV supply, JSSC, vol SC-22, Oct 1987.
- B Gabillard et al, A 200 mW GaAs 1K SRAM with 2ns cycle time, JSSC, vol SC-22, pp 693–698, Oct 1987.
- T Hayashi et al, A circuit technology for ECL compatible GaAs static RAM with small access time scattering, JSSC, vol SC-22, pp 853–860, Oct 1987.
- L E Larson et al, Comparison of gain enhancement techniques for GaAs MESFET analog integrated circuits, Electron Lett, vol 22, pp 1138–1139, 1986.
- Norman Scheinberg, High speed operational amplifier using Mesfets, JSSC, vol 22, pp 522–527, Aug 1987.
- A Abidi, An analysis of Bootstrapped gain enhancement techniques, JSSC, pp 1200–1204, Dec 1987.
- L E Larson et al, GaAs switched capacitor circuits for high speed signal processing, JSSC, pp 971–981, Dec 1987.
- L E Larson et al. An ultra high speed GaAs MESFET operational amplifier, JSSC, vol 24, pp 1523–1528, Dec 1989.
- K Poulton et al, 1 GHz 6b ADC system, JSSC, pp 962–970, Dec 1987.
- Kuo-chiang Hsieh, 12-b 1 G word/s GaAs digital to analog converter system, Ibid, pp 1048–1055, Dec 1987.
- Alain Dubois et al, SSI/MSI analog and digital GaAs IC's for real time signal processing for microstrip printed circuit board applications, JSSC, vol 23, pp 681–687, Jun 1988.
- Francois Thomas et al, 1 GHz GaAs analog to digital converter building blocks, JSSC, vol 24, pp 223–228, Apr 1989.