REFERENCES
- JAC Bingham, Multicarrier modulation for data transmission: An idea whose time has come, IEEE Communication Magazine, vol 36, Feb 1998, pp 112–117.
- R Van Nee & R Prasad, OFDM wireless multimedia Communication, Artech House, Boston, 2000.
- IS Abu-Khater, A Bellaouarar & MI Elmasry, Circuit techniques for CMOS low-power high-performance multipliers, IEEE Journal of Solid-State Circuits, vol 31, no 10, Oct 1996, pp 1535–1546.
- AC McCormick, PM Grant, JS Thompson, T Arslan & AT Erdogan, Low power receiver architectures for multi-carrier CDMA, IEE Proceedings Circuits, Devices and Systems, vol 149, Issue 4, Aug 2002, pp 227–233.
- K Masselos, PK Merakos, T Stouraitis & CE Goutis, Novel techniques for bus power consumption reduction in realizations of Sum-of-Product computations, IEEE Transactions on Very large Scale Integration Systems, vol 7, no 4, December 1999.
- Bi Guoan & EV Jones, A Pipelined FFT Processor for Word-Sequential Data, IEEE Transaction on Acoustics, Speech, and Signal Processing, vol 37, no 12, December pp 1982–1985.
- L Fanucci, M Forliti & P Terreni, Fast FFT ASIC automated synthesis, in Integration the VLSI Journal, vol 33, pp 23–37, 2002.
- M Hasan & T Arslan, Implementation of low power FFT processor cores using a novel order based processing scheme, IEE Proceedings on Circuits, Devices and Systems, vol 150, no3, pp 149–154, June 2003.
- M Hasan & T Arslan, A Triple port RAM based low power Commutator architecture for a pipelined FFT processor, International symposium on Circuits and Systems, vol 5, pp 353–356, May 2003.
- W Li & L Wanhammar, A pipeline FFT processor, IEEE workshop on Signal Processing Systems, vol 4, pp 654–662, October 1999.