Modified Ternary Karnaugh Map and Logic Synthesis in Ternary Quantum Dot Cellular Automata

REFERENCES

• C. S. Lent, P. D. Taugaw, W. Porod, and G. H. Bernstein, “Quantum cellular automata,” Nanotechnology, vol. 4, pp. 49–57, Jan. 1993.
   Google Scholar
• I. Amlani, A. Orlov, G. Snider, C. Lent, W. Porod, and G. Bernstein, “Experimental demonstration of electron switching in a quantum-dot cellular automata (QCA) cell,” Superlattices Microstruct., vol. 25 (1–2), pp. 273–278, Jan. 1999.
   Web of Science ®Google Scholar
• P. Douglas Tougaw, and C. S. Lent, “Dynamic behavior of quantum cellular automata,” J. Appl. Phys., vol. 80, pp. 4722–4736, Oct. 1996.
   Web of Science ®Google Scholar
• C. Lent and P. Tougaw, “A device architecture for computing with quantum dots,” in Proc. IEEE, Apr. 1997, pp. 541–557.
   Web of Science ®Google Scholar
• G. Toth and C. Lent, “Quasiadiabatic switching for metal-island quantum dot cellular automata,” J. Appl. Phys., vol. 85, pp. 2977–2984, Mar. 1999.
   Web of Science ®Google Scholar
• International technology roadmap for semiconductors. 2008, Semiconductor Industries Association. San Jose, CA. Available: http://public.itrs.net
   Google Scholar
• M. B Thoori, J. Huang, M. Momenzadeh, and F. Lombardi, “Testing of quantum cell automata,” IEEE Trans. Nanotechnol., vol. 3(4), pp. 432–442, Dec. 2004.
   Web of Science ®Google Scholar
• M. Momenzadeh, J. Huang, M. B. Tahoori, and Lombardi, “Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation,” Comput. Aided Des. Integrated Circuits Syst., IEEE Trans., vol. 24, pp. 1881–1893, Dec. 2005.
   Web of Science ®Google Scholar
• M. B. Tahoori, M. Momenzadeh, J. Huang, and F. Lombardi, “Defects and faults in quantum cellular automata at nano scale,” in Proc. VLSI Test Symp., Napa Valley, CA, 2004, pp. 291–296.
   Google Scholar
• W. N. N. Hung, X. Song, G. Yang, J. Yang, and M. Perkowski, “Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis,” IEEE Trans. Computer-Aided Des., vol. 25(9), pp. 1652–1663, Sep. 2006.
   Web of Science ®Google Scholar
• P. D. Tougaw and C. S. Lent, “Logical devices implemented using quantum cellular automata,” J. Appl. Phys., vol. 75(3), pp. 1818–1825, Feb. 1994.
   Web of Science ®Google Scholar
• K. Das and D. De, “Characterization, test and logic synthesis of novel conservative & reversible logic gates for QCA,” Int. J. Nanosci. World Sci., vol. 9(2), pp. 201–214, Jun. 2010.
   Google Scholar
• K. Das and D. De, “Novel approach to design a testable conservative logic gate for QCA implementation,” in Proc. IEEE Intr. Conf. IACC’2010, Delhi, 19 Feb.–20 Feb. 2010. pp. 82–87.
   Google Scholar
• K. Das and D. De, A novel approach of and-or-inverter (AOI) gate design for QCA, in Proc. IEEE conf. CODEC-09, Kolkata, 14–16 Dec. 2009, pp. 1–4.
   Google Scholar
• K. Das and D. De, “Characterization, applicability and defect analysis for tiles nanostructure of quantum dot cellular automata,” J. Mol. Simul., Taylor & Francis, vol. 37(3), pp. 210–225, Mar. 2011.
   Web of Science ®Google Scholar
• K. Das and D. De, “A study on diverse nanostructure for implementing logic gate design for QCA,” Int. J. Nanosci. World Sci., vol. 10(1–2), pp. 263–269, Feb. & Apr.2011.
   Google Scholar
• K. C. Smith, “The prospects for multivalued logic: A technology and applications view,” IEEE Trans. Comput., vol. 100 (9), pp. 619–634, Sept. 1981.
   Google Scholar
• I. Lebar Bajec, N. Zimic, and M. Mraz, “The ternary quantum-dot cell and ternary logic,” IOP Nanotechnol., vol. 17, (8), pp. 1937–1942, Mar. 2006.
   Web of Science ®Google Scholar
• P. Pecar, M. Mraz, N. Zimic, M. Janez, and I. L. Bajec, “Solving the ternary QCA logic gate problem by means of adiabatic switching,” Japanese J. Appl. Phys., vol. 47(6), pp. 5000–5006, Jun. 2008.
   Web of Science ®Google Scholar
• P. Pecar, A. Ramsak, N. Zimic, M. Mraz, and I. Lebar Bajec,” Adiabatic pipelining: A key to ternary computing with quantum dots,” IOP Nanotechnol., vol. 19(49), pp. 495401, Nov. 2008.
   PubMed Web of Science ®Google Scholar
• I. Lebar Bajec and P. Pecar, “Two-layer synchronized ternary quantum dot cellular automata wire crossings,” Nanoscale Res. Lett., vol. 7, p. 221, Dec. 2012. doi:10.1186/1556-276X-7-221.
   PubMed Web of Science ®Google Scholar
• P. Pecar and I. Lebar Bajec, “The key elements of logic design in ternary quantum-dot cellular automata,” Unconventional Comput. Lect. Notes Comput. Sci., vol. 6714, pp. 177–188, Jun. 2011. doi:10.1007/978-3-642-21341-0_21.
   Google Scholar
• K. Das, D. De, and M. De “Realisation of semiconductor ternary quantum dot cellular automata,” Micro Nano Lett., vol. 8(5), pp. 258–263, May 2013.
   Web of Science ®Google Scholar
• K. Maurice, “The map method for synthesis of combinational logic circuits,” Trans. Am. Inst. Electrical Eng. Part I, vol. 72(9), pp. 593–599, Nov. 1953, doi:10.1109/TCE.1953.6371932.
   Google Scholar
• X. W. Wu and F. P. Prosser. “CMOS ternary logic circuits,” IEE Proc. G (Circuits Devices Syst.), vol. 137, (1), pp. 21–27, Feb. 1990.
   Web of Science ®Google Scholar
• Gerald A. Maley, “Basic ternary logic circuits,” U.S. Patent No. 3,660,678. 1972.
   Google Scholar
• E. D. Olson, “Multiple-valued logic circuit architecture; Supplementary symmetrical logic circuit structure (SUS-LOC),” U.S. Patent No. 6,133,754. 17 Oct. 2000.
   Google Scholar
• T. Sasao, “Ternary decision diagrams. Survey,” in Proc. 1997 27th Int. Symp. Multiple-Valued Logic, 1997, 1997, pp. 241–250.
   Google Scholar
• S. C. Kleene, “On notation for ordinal numbers. J. Symbolic Logic., vol. 3, pp. 150–155, Dec. 1938.
   Google Scholar
• P. Bhattacharjee, K. Das, M. De, and D. De, “SPICE modeling and analysis for metal island ternary QCA logic device,” Inf. Syst. Des. Intelligent Appl., Springer India, pp. 33–41. 2015.
   Google Scholar
• W. Wang, R. Zhang, K. Walus, and G. A. Jullien, “A method of majority logic reduction for quantum cellular automata,” IEEE Trans. Nanotechnol., vol. 3(4), pp. 443–450, Dec. 2004.
   Web of Science ®Google Scholar
• D. Porto, “Nanoscale qca-based logic gates in graphene technology,” U.S. Patent Application No. 14/144,801.
   Google Scholar