VLSI layout of Benes networks

References

• Avior , A. , Calamoneri , T. , Even , S. , Litman , A. and Rosenberg , A. L. 1998 . A tight layout of the butterfly network . Theory of Computing Systems , 31 ( 4 ) : 474 – 488 .
   Google Scholar
• Bhatt , S. N. and Leighton , F. T. 1983 . A framework for solving VLSI graph layout problems . MIT/LCS/TR , 305 ( 44 )
   Google Scholar
• Bodlaender , H. L. 1989 . Achromatic number is NP-complete for co-graphs and interval graphs . Information Processing Letters , 32 ( 3 ) : 135 – 138 .
   Google Scholar
• Bornstein , C. , Litman , A. , Maggs , B. M. , Sitaraman , R. K. and Yatzkary , T. 2001 . On the bisection width and expansion of butterfly networks . Theory of Computing Systems , 34 ( 6 ) : 491 – 518 .
   Google Scholar
• Dinitz , Y. , Even , S. , Kupershtok , R. and Zapolotsky , M. 1999 . Some compact layouts of the butterfly . Proceedings of the 11th Annual ACM Symposium on Parallel Algorithms and Architectures . June 27–30 1999 , Saint Malo , France . pp. 54 – 63 . in
   Google Scholar
• Garey , M. R. and Johnson , D. S. 1979 . Computers and Intractability: A Guide to the Theory of NP-Completeness , W. H. Freeman and Company .
   Google Scholar
• Hung , L. T. Q. , Syslo , M. M. , Weaver , M. L. and West , D. B. 1998 . Bandwidth and density for block graphs . Discrete Mathematics , 189 : 163 – 176 .
   Google Scholar
• Konstantinidou , S. 1993 . The selective extra stage butterfly . IEEE Transactions on Very Large Scale Integration Systems , 1 ( 2 ) June
   Google Scholar
• Leighton , T. F. 1992 . Introduction to Parallel Algorithms and Architecture: Arrays, Trees, Hypercubes , Morgan Kaufmann Publishers .
   Google Scholar
• Liu , X. and Gu , Q. P. 2002 . Multicasts on WDM all-optical butterfly networks . Journal of Information Science and Engineering , 18 : 1049 – 1058 .
   Google Scholar
• Manlove , D. and McDiarmid , C. 1995 . The complexity of harmonious coloring for trees . Discrete Applied Mathematics , 57 : 133 – 144 .
   Google Scholar
• Thompson , C. D. 1979 . “ Area-time complexity for VLSI ” . In 11th Annual ACM Symposium on Theory of Computing in
   Google Scholar
• Xu , J. 2001 . Topological Structure and Analysis of Interconnection Networks , Kluwer Academic Publishers .
   Google Scholar
• Yeh , C. H. , Parhami , B. , Varvarigos , E. A. and Lee , H. 2000 . VLSI layout and packaging of butterfly networks . Proceedings of the 12 Annual ACM Symposium on Parallel Algorithms and Architectures . July 09–13 2000 , Bar Harbor , Maine , United States. pp. 196 – 205 . in
   Google Scholar
• Dinitz , Y. , Even , S. and Zapolotsky , M. 2003 . A compact layout of the butterfly . Journal of Interconnection Networks , 4 ( 1 ) : 53 – 75 .
   Google Scholar
• Muthukrishnan , S. , Paterson , M. S. , Sahinalp , S. C. and Suel , T. 1999 . Compact grid layouts of some multi-level networks . 31st Symposium of Theory of Computing . May 1999 , Atlanta , Georgia . pp. 455 – 463 . in
   Google Scholar