REFERENCES
- Womack , R. Feb. 1989 . “ A 16 kb ferroelectric nonvolatile memory with a bit parallel architecture ” . In ISSCC Dig. Tech Papers pp. 242 – 243 .
- Takashima , D. 1998 . High-density chain ferroelectric random access memory (chain FRAM) . IEEE J. Solid-State Circuits , 34 : 1557 – 1563 . http://www.csa.com/htbin/linkabst.cgi?issn=0018-9200&vol=34&iss=&firstpage=1557
- Koike , H. 1996 . A 60-ns 1-Mb nonvolatile ferroelectric memory with a nondriven cell-plate line write/read scheme . IEEE J. Solid-State Circuits , 31 : 1625 – 1634 . http://dx.doi.org/10.1109%2FJSSC.1996.542307
- Sumi , T. Feb. 1994 . “ A 256 Kb nonvolatile ferroelectric memory at 3 V and 100 ns ” . In ISSCC Dig. Tech Papers pp. 268 – 269 .
- Takashima , D. 1999 . A sub-40-ns chain FRAM architecture with 7-ns cell-plate-line drive . IEEE J. Solid-State Circuits , 34 : 1557 – 1563 . http://www.csa.com/htbin/linkabst.cgi?issn=0018-9200&vol=34&iss=&firstpage=1557 http://dx.doi.org/10.1109%2F4.799863