REFERENCES
- Bailey , M. A. and Ho , F. D. May 27–June 1 2002 . A metal-ferroelectric semiconductor field-effect transistor memory cell. International Joint Conference on Applications of Ferroelectrics Japan
- Keng , S. M. and Leblebici , Y. 2003 . CMOS Digital Integrated Circuits , pp. 419 – 421 . New York : McGraw Hill .
- Bailey , M. A. and Ho , F. D. 2003 . Metal-ferroelectric-semiconductor field-effect transistor modeling using a partitioned ferroelectric layer . Integrated Ferroelectrics , 51 : 19 – 37 . http://www.csa.com/htbin/linkabst.cgi?issn=1058-4587&vol=51&iss=&firstpage=19