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Integrated Ferroelectrics
An International Journal
Volume 67, 2004 - Issue 1
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Original Articles

Fabrication of 1K-Bit 1T2C-Type Ferroelectric Memory Cell Array

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Pages 281-286 | Received 01 Apr 2004, Accepted 01 Jul 2004, Published online: 12 Aug 2010

REFERENCES

  • Ross I. M. , Semiconductive Translating Device , US Patent 1957, No. 2791760 .
  • Moll , J. L. and Tarui , Y. 1963 . A new solid state memory resistor . IEEE Trans. Electron Devices , ED-10 : 338
  • Nakamura , T. , Nakao , Y. , Kamisawa , A. and Takasu , H. 1995 . A single-transistor ferroelectric memory cell, ISSCC Digest of Technical Papers 68 – 69 .
  • Ishiwara , H. 1998 . Proposal of a novel ferroelectric-gate field effect transistor with separated functions for data read-out and data storage . Ext. Abstr. 1998 Int. Conf. SSDM , : 222 – 223 .
  • Yoon , S. M. and Ishiwara , H. 2001 . Memory operations of 1T2C-type ferroelectric memory cell with excellent data retention characteristics . IEEE Tran. Electron Devices , 48 : 2002 – 2008 . http://www.csa.com/htbin/linkabst.cgi?issn=0018-9383&vol=48&iss=&firstpage=2002 http://dx.doi.org/10.1109%2F16.944189
  • Kim , H. S. , Yamamoto , S. and Ishiwara , H. 2003 . Operation simulation of an 8F2 1T2C-type ferroelectric memory array with a revised data writing method. To be published in Integr. Ferroelectr

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