An FPGA-friendly CABAC-encoding architecture with dataflow modelling programming

References

• ITU homepage. http://www.itu.int/en/ITU-T.
   Google Scholar
• MPEG homepage. http://mpeg.chiariglione.org.
   Google Scholar
• ITU-T. Line transmission of non-telephone signals: video coding for low bitrate communication. Standard No. H.263:2005.
   Google Scholar
• ISO/IEC. Information technology – generic coding of moving pictures and associated audio information: Video. Standard No.13818-2:2000.
   Google Scholar
• ITU-T. Series h: audiovisual and multimedia systems infrastructure of audiovisual services – coding of moving video: advanced video coding for generic audiovisual services. Standard No. H.264:2003.
   Google Scholar
• ITU-T. Series H: audiovisual and multimedia systems infrastructure of audiovisual services – coding of moving video: high efficiency video coding. Standard No. H.265:2013.
   Google Scholar
• Jang ES, Mattavelli M, Preda M, et al. Reconfigurable media coding: an overview. Signal Process Image Commun. 2013;28(10):1215–1223. doi:10.1016/j.image.2013.08.008.
   Web of Science ®Google Scholar
• ISO/IEC. MPEG systems technologies – Part 4: codec configuration representation. Standard no. 23001-4:2011.
   Google Scholar
• Casale-Brunet S, Elguindy A, Bezati E, et al. Methods to explore design space for MPEG RMC codec specifications. Signal Process Image Commun. 2013;28(10):1278–1294. doi: 10.1016/j.image.2013.08.012
   Web of Science ®Google Scholar
• Amer I, Lucarz C, Roquier G, et al. Reconfigurable video coding on multicore an overview of its main objectives. IEEE Signal Process Mag. 2009;26:113–123. doi: 10.1109/MSP.2009.934107
   Web of Science ®Google Scholar
• Ding D, Qi H, Yu L, et al. Reconfigurable video coding framework and decoder reconfiguration instantiation of AVS. Signal Process, Image Commun. 2009;24(4):287–299. doi:10.1016/j.image.2008.12.002.
   Web of Science ®Google Scholar
• China Audio and Video Standard (AVS). Information technology advanced coding of audio and video part2: video. Standard No. GB/T 20090.2:2006.
   Google Scholar
• Jerbi K, Yviquel H, Sanchez A, et al. On the development and optimization of HEVC video decoders using high-level dataflow modeling. J Signal Process Syst Signal Image Video Technol. 2017;87(1):127–138. doi: 10.1007/s11265-016-1113-x
   Web of Science ®Google Scholar
• Chavarrias M, Pescador F, Garrido MJ, et al. A DSP-based HEVC decoder implementation using an actor language dataflow model. IEEE Trans Consum Electron. 2013;59(4):839–847. doi:10.1109/TCE.2013.6689697.
   Web of Science ®Google Scholar
• Michalska M, Casale-Brunet S, Bezati E, et al. High-precision performance estimation of dynamic dataflow programs. 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC); 2016 Sept.21–23; Lyon, France.
   Google Scholar
• Yviquel H, Sanchez A, Jaaskelainen P, et al. Efficient software synthesis of dynamic dataflow programs). 2014 IEEE international conference on acoustics, speech and signal processing (ICASSP); 2014 May 4–9. Florence, Italy.
   Google Scholar
• Carlsson A, Eker J, Olsson T, et al. Scalable parallelism using dataflow programming. Ericsson Rev. 2010;2(1):16–21.
   Google Scholar
• Yviquel H, Boutellier J, Raulet M, et al. Automated design of networks of transport-triggered architecture processors using dynamic dataflow programs. Signal Process Image Commun. 2013;28(10):1295–1302. doi:10.1016/j.image.2013.08.013.
   Web of Science ®Google Scholar
• Christophe L, Piat J, Mattavelli M, et al. Automatic synthesis of parsers and validation of bitstreams within the MPEG reconfigurable video coding framework. J Signal Process Syst Signal Image Video Technol. 2011;63(2):215–225. doi:10.1007/s11265-009-0395-7.
   Web of Science ®Google Scholar
• Kim H, Kim S, Lee S, et al. Parser description-based bitstream parser generation for MPEG RMC framework. Signal Process Image Commun. 2013;28(10):1255–1277. doi: 10.1016/j.image.2013.08.011
   Web of Science ®Google Scholar
• ISO/IEC. Information technology – MPEG systems technologies – Part 5: Bitstream syntax description language. standard No. 23001-5:2008.
   Google Scholar
• Sze V, Budagavi M. High throughput CABAC entropy coding in HEVC. IEEE Trans Circuits Syst Video Technol. 2013;22(12):1778–1779. doi: 10.1109/TCSVT.2012.2221526
   Web of Science ®Google Scholar
• Wahiba M, Abdellah S, Aichouche B. Implementation of parallel-pipeline H.265 CABAC decoder on FPGA); 2017 first international conference on embedded & distributed systems (EDiS); 2017 Dec.17–18; Oran, Algeria.
   Google Scholar
• Habermann P, Chi CC, Alvarez-Mesa, et al. Application-specific cache and prefetching for HEVC CABAC decoding. IEEE Multimedia. 2017;24(1):72–85. doi:10.1109/MMUL.2017.12.
   Web of Science ®Google Scholar
• Auli-Llinas F, Enfedaque P, Moure JC, et al. Bitplane image coding with parallel coefficient processing. IEEE Trans Image Process. 2016;25(1):209–219. doi:10.1109/TIP.2015.2484069.
   PubMed Web of Science ®Google Scholar
• Choi Y, Choi J. High-throughput CABAC codec architecture for HEVC. Electron Lett. 2013;49(18):1145–1147. doi: 10.1049/el.2013.1811
   Web of Science ®Google Scholar
• Peng B, Ding D, Zhu X, et al. A hardware CABAC encoder for HEVC. 2013 IEEE Internacional Symposium on Circuits and Systems (ISCAS); 2013 May 19–23; Beijing, China.
   Google Scholar
• Zhou D, Zhou J, Fei W, et al. Ultra-high-throughput VLSI architecture of H.265/HEVC CABAC encoder for UHDTV applications. IEEE Trans Circuits Syst Video Technol. 2015;25(3):497–507. doi: 10.1109/TCSVT.2014.2337572
   Web of Science ®Google Scholar
• Vizzotto B, Mazui V, Bampi S. Area efficient and high throughput CABAC encoder architecture for HEVC. 15th IEEE international conference on electronics, circuits, and systems (ICECS); 2015 Feb.25–27; Coimbatore, India.
   Google Scholar
• ISO/IEC. Information technology MPEG video technologies part 4: video tool library. Standard No.23002-4:2010.
   Google Scholar
• Eker J, Janneck J. CAL language report. Berkeley: University of California at Berkeley; 2003.
   Google Scholar
• Yviquel H, Lorence A, Jerbi K, et al. Orcc: multimedia development made easy. 21st ACM international conference on multimedia; 2013 Oct.; Barcelone, France.
   Google Scholar
• Jerbi K, Abid M, Raulet M, et al. Automatic generation of synthesizable hardware implementation from high level RVC-CAL description. 2012 international conference on acoustics, speech, and signal processing (ICASSP); 2012 March 25–30; Kyoto, Japan.
   Google Scholar
• Abid M, Jerbi K, Raulet M, et al. Efficient system-level hardware synthesis of dataflow programs using shared memory based FIFO: HEVC decoder case study. J Signal Process Syst. 2017;90(1):127–144. doi: 10.1007/s11265-017-1226-x
   Web of Science ®Google Scholar
• Ramos FLL, Goebel J, Zatt B, et al. Low-power hardware design for the HEVC Binary arithmetic encoder targeting 8K videos. 29th Symposium on integrated circuits & systems design (SBCCI); 2016 Aug.29-Sept.3; Belo Horizonte, Brazil.
   Google Scholar