An adaptive harmonic abatement in three-phase multilevel inverter topology with reduced switches using metaheuristic approaches for renewable energy applications

References

• Ahmed, M., A. Sheir, and M. Orabi. 2017. Real-time solution and implementation of selective harmonic elimination of seven-level multilevel inverter. IEEE Journal of Emerging and Selected Topics in Power Electronics 5 (4):1700–09. doi:10.1109/JESTPE.2017.2746760.
   Web of Science ®Google Scholar
• Akbari, A., J. Ebrahimi, Y. Jafarian, and A. Bakhshai. 2022. A multilevel inverter topology with an improved reliability and a reduced number of components. IEEE Journal of Emerging and Selected Topics in Power Electronics 10 (1):553–63. doi:10.1109/JESTPE.2021.3089867.
   Web of Science ®Google Scholar
• Anbarasan, P., V. Krishnakumar, S. Ramkumar, and S. Venkatesan. 2021. A new three-phase multilevel DC-link inverter topology with reduced switch count for photovoltaic applications. Circuit World 47 (2):173–83. Emerald Publishing Ltd. doi:10.1108/CW-12-2019-0200.
   Web of Science ®Google Scholar
• Babaei, E., C. Buccella, and M. Saeedifard. 2016. Recent advances in multilevel inverters and their applications - Part I. IEEE Transactions on Industrial Electronics 63 (11):7145–47. doi:10.1109/TIE.2016.2602270.
   Web of Science ®Google Scholar
• Elias, M. F. M., N. A. Rahim, H. W. Ping, and M. N. Uddin. 2014. Asymmetrical cascaded multilevel inverter based on transistor-clamped H-bridge power cell. IEEE Transactions on Industry Applications 50 (6):4281–88. doi:10.1109/TIA.2014.2346711.
   Web of Science ®Google Scholar
• Etesami, M., N. Ghasemi, D. M. Vilathgamuwa, and W. L. Malan. 2017. Particle swarm optimisation-based modified SHE method for cascaded H-bridge multilevel inverters. IET Power Electronics 10 (1):18–28. doi:10.1049/iet-pel.2015.0864.
   Web of Science ®Google Scholar
• Filho, F., L. M. Tolbert, Y. Cao, and B. Ozpineci. 2011. Real-time selective harmonic minimization for multilevel inverters connected to solar panels using artificial neural network angle generation. IEEE Transactions on Industrial Applications 47 (5):2117–24. doi:10.1109/TIA.2011.2161533.
   Web of Science ®Google Scholar
• Gupta, A. K., and A. M. Khambadkone. 2006. A space vector PWM scheme for multilevel inverters based on two-level space vector PWM. IEEE Transactions on Industrial Electronics 53 (5):1631–39. doi:10.1109/TIE.2006.881989.
   Web of Science ®Google Scholar
• Haghdar, K. 2020. Optimal DC source influence on selective harmonic elimination in multilevel inverters using teaching–learning-based optimization. IEEE Transactions on Industrial Electronics 67 (2):942–49. doi:10.1109/TIE.2019.2901657.
   Web of Science ®Google Scholar
• Hosseinzadeh, M. A., M. Sarebanzadeh, E. Babaei, M. Rivera, and P. Wheeler. 2021. A switched-DC source sub-module multilevel inverter topology for renewable energy source applications. IEEE Access 9:135964–82. doi:10.1109/ACCESS.2021.3115660.
   Web of Science ®Google Scholar
• Kakar, S., B. M. Ayob, A. Iqbal, N. M. Nordin, M. S. B. Arif, and S. Gore. 2021. New asymmetrical modular multilevel inverter topology with reduced number of switches. IEEE Access 9:27627–37. doi:10.1109/ACCESS.2021.3057554.
   Web of Science ®Google Scholar
• Kannan, E., M. Avudaiappan, S. Kaliyaperumal, S. Muthusamy, H. Panchal, S. Pandiyan, and A. Azhaganantham. 2022. A novel strategy for implementation of intelligent techniques in solar photovoltaic arrays to improve the performance and various comparison of partial shading mitigating techniques. Energy Sources, Part A: Recovery, Utilization, and Environmental Effects 44 (2):3079–99. doi:10.1080/15567036.2022.2060381.
   Web of Science ®Google Scholar
• Kavousi, A., B. Vahidi, R. Salehi, M. K. Bakhshizadeh, N. Farokhnia, and S. H. Fathi. 2012. Application of the Bee Algorithm for selective harmonic elimination strategy in multilevel inverters. IEEE Transactions on Power Electronics 27 (4):1689–96. doi:10.1109/TPEL.2011.2166124.
   Web of Science ®Google Scholar
• Lee, S. S., B. Chu, N. R. N. Idris, H. H. Goh, and Y. E. Heng. 2016. Switched-battery boost-multilevel inverter with GA optimized SHEPWM for standalone application. IEEE Transactions on Industrial Electronics 63 (4):2133–42. doi:10.1109/TIE.2015.2506626.
   Web of Science ®Google Scholar
• Massrur, H. R., T. Niknam, M. Mardaneh, and A. H. Rajaei. 2016. Harmonic elimination in multilevel inverters under unbalanced voltages and switching deviation using a new stochastic strategy. IEEE Transactions on Industrial Informatics 12 (2):716–25. doi:10.1109/TII.2016.2529589.
   Web of Science ®Google Scholar
• Memon, M. A., M. D. Siddique, S. Mekhilef, and M. Mubin. 2022. Asynchronous particle swarm optimization-genetic algorithm (APSO-GA) based selective harmonic elimination in a cascaded H-bridge multilevel inverter. IEEE Transactions on Industrial Electronics 69 (2):1477–87. doi:10.1109/TIE.2021.3060645.
   Web of Science ®Google Scholar
• Nguyen, N. T., T. Nguyen, and H. Lee. 2015. A reduced switching loss PWM strategy to eliminate common-mode voltage in multilevel inverters. IEEE Transactions on Power Electron 30 (10):5425–38. doi:10.1109/TPEL.2014.2377152.
   Web of Science ®Google Scholar
• Panda, K. P., P. R. Bana, and G. Panda. 2020. FPA optimized selective harmonic elimination in symmetric–Asymmetric reduced switch cascaded multilevel inverter. IEEE Transactions on Industry Applications 56 (3):2862–70. doi:10.1109/TIA.2020.2981601.
   Web of Science ®Google Scholar
• Pradeep, J., K. Vengadakrishnan, A. Palani, and T. Sandirasegarane. 2022. A new tri-source symmetric cascaded multilevel inverter topology with reduced power components. Circuit World. doi:10.1108/CW-06-2021-0184.
   Web of Science ®Google Scholar
• Sahoo, S. K., and T. Bhattacharya. 2018. Phase-shifted carrier-based synchronized sinusoidal PWM techniques for a cascaded H-bridge multilevel inverter. IEEE Transactions on Power Electron 33 (1):513–24. doi:10.1109/TPEL.2017.2669084.
   Web of Science ®Google Scholar
• Siddique, M. D., J. S. M. Ali, S. Mekhilef, A. Mustafa, N. Sandeep, and D. Almakhles. 2020. Reduced switch count based single source 7L boost inverter topology. IEEE Transactions on Circuits and Systems II: Express Briefs 67 (12):3252–56. doi:10.1109/TCSII.2020.2988090.
   Web of Science ®Google Scholar
• Siddique, M. D., M. S. Bhaskar, M. Rawa, S. Mekhilef, M. A. Memon, P. Sanjeevikumar, D. J. Almakhles, and U. Subramaniam. 2021. Single-phase hybrid multilevel inverter topology with low switching frequency modulation techniques for lower order harmonic elimination. IET Power Electronics 13 (17):4117–27. doi:10.1049/iet-pel.2020.0620.
   Web of Science ®Google Scholar
• Siddique, M. D., S. Mekhilef, N. M. Shah, and M. A. Memon. 2019. Optimal design of a new cascaded multilevel inverter topology with reduced switch count. IEEE Access 7:24498–510. doi:10.1109/ACCESS.2019.2890872.
   Web of Science ®Google Scholar
• Taghizadeh, H., and M. TarafdarHagh. 2010. Harmonic elimination of cascade multilevel inverters with non equal DC sources using particle swarm optimization. IEEE Transactions on Industrial Electronics 57 (11):3678–84. doi:10.1109/TIE.2010.2041736.
   Web of Science ®Google Scholar
• Yang, K., X. Lan, Q. Zhang, and X. Tang. 2018. Unified selective harmonic elimination for cascaded H-bridge asymmetric multilevel inverter. IEEE Journal of Emerging and Selected Topics in Power Electronics 6 (4):2138–46. doi:10.1109/JESTPE.2018.2808539.
   Web of Science ®Google Scholar