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IETE Journal of Research Volume 58, 2012 - Issue 2
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Original Articles

System-on-chips Design Using ISCAS Benchmark Circuits - An Approach to Fault Injection and Simulation Based on Verilog HDL

Sunil R. DasSchool of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, OttawaON K1N 6N5, Canada;Department of Computer ScienceCollege of Arts and Sciences, Troy University, Montgomery36103, ALUSAView further author information
,
Satyendra N. BiswasSchool of Engineering and Computer Science, Independent University, Dhaka1329, BangladeshView further author information
,
Dhruv BiswasSchool of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, OttawaON K1N 6N5, CanadaView further author information
,
Emil M. PetriuSchool of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, OttawaON K1N 6N5, CanadaView further author information
&
Mansour H. AssafFaculty of Science and Technology, University of the South Pacific (USP), Suva, FijiView further author information
Pages 107-113 | Published online: 01 Sep 2014

References

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  • D Biswas, “A System-on-a-Chip Testing Methodology”, M.A.Sc. thesis, University of Ottawa, School of Information Technology and Engineering, Ottawa, Canada. 2005.
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