Chiplets for Integration of Electronic Systems

Abstract

Scaling down of transistor sizes has made it possible to integrate billions of devices in the same chip, allowing us to build entire electronic systems into tiny “systems on chip” (SoC). For about four decades after the proclamation of Moore's law, device scaling resulted in improvements in area, performance as well as power. In the last two decades, many semiconductor manufacturers stopped investing in new technology nodes since the design, manufacturing, and test challenges in deep submicron technologies are far too steep. Today, semiconductor companies do not rely on improvements in photolithography alone to build more complex systems. Similarly, optimizations at gate level or register-transfer level through electronic design automation tools will not suffice to bring in order-of-magnitude increase in the complexity of SoC, since these tools are already mature. Therefore, optimization at the system level is the only logical step forward. Chiplets represent a system-level packaging innovation and there is much research and development in using this technology for building high-performance computing systems. We believe that it will be worthwhile to include the topic of system-level integration in a course on Very Large-Scale Integrated Circuit Design taught in the Universities and provide a tutorial treatment to help teachers and students.

Keywords:

• Chiplets
• multi-chip modules
• packaging
• silicon interposer
• system integration
• system-in-chip

Disclosure statement

No potential conflict of interest was reported by the author(s).

Additional information

Notes on contributors

C.P. Ravikumar

CP Ravikumar is presently the director of Talent Development at Texas Instruments, India. (2001-) He is also an adjunct faculty at IIT Madras (2008-). Before joining TI India in 2001, Ravikumar was a professor of electrical engineering at the Indian Institute of Technology, Delhi (1991-2001). He also held a visiting position at the University of Southern California (1995-1996) and the position of vice president (training) at Controlnet India Pvt Ltd (2000-2001). He obtained his PhD (computer engineering) from the University of Southern California (1991), ME in computer science with highest scores from Indian Institute of Science (1987) and BE in electronics with a Gold Medal from Bangalore University (1983). He has published over 200 papers in leading International conferences and journals. He has 4 US patents in the area of VLSI Test. He founded the VLSI Design and Test Symposium (VDAT) and has been the general chair of this event from its inception in 1998. He is the author/editor/coauthor of over 15 books in areas of VLSI and has contributed several book chapters. He has served as an associate editor of IEEE Transactions on Circuits and Systems and has served on editorial board of the Journal of Electronic Testing. Ravikumar is a senior member of IEEE and a Fellow of INAE.