Abstract
The method of syndrome testing of combinational circuits was introduced in [1] and [2], It was shown that, in general, syndrome testable combinational circuits require some pin-penalty and/or testing time penalty.
In the present paper, a method is presented for the syndrome testing of syndrome-untestable combinational circuits. The basic idea is to measure the syndrome at several different points of the circuit-under-test simultaneously. In this method, the extra testing-time penalty of [1] and [2] is traded off with extra logic. The method can also be used for built-in test.