MOS Amplifier Design Methodology for Optimum Performance

Abstract

While trying to represent the performance metrics of a single-stage amplifier as a function of designable parameters, it is observed that the corresponding metrics form a polytope-type feasible region. Indeed, the polytope so formed is made up of performance metrics which can either be objectives or constraints. Initially, the simplex method is used to obtain an objective value that satisfies a set of constraints. Once the objective is available, the interior point-based method is used to check whether any objective lies inside the feasible region or not. The proposed design flow examines both the periphery and the interior of the polytope so generated. Henceforth, the design of an amplifier can be pointed out to be a distinctive type of optimization concern, called Nonlinear Programming (NLP). Furthermore, efficient global optimization methods have been established to yield an automated synthesis of amplifiers derived from the requirements. In this work, the formulation of the design problem for a cascode amplifier as NLP is described and analyzed. Thereafter, the optimal trade-off curves related to the performance metrics such as small signal gain (Av), unity gain frequency (UGF) or gain bandwidth product (GBWP), and power are derived in order to observe the corresponding dependencies.

KEYWORDS:

• Amplifier circuits
• Nonlinear programming
• Simplex method
• Small signal gain
• Slew rate
• Unity gain frequency

Additional information

Notes on contributors

Abir J. Mondal

Abir J Mondal obtained his BTech in electronics and communication engineering from the University Institute of Technology, Burdwan University, West Bengal, India, in 2007. He has completed his MTech in microelectronics and VLSI from the National Institute of Technology Durgapur, India, in 2011. He joined the Computer Engineering Department of the Malaviya National Institute of Technology, Jaipur, India, in 2011 as a Research Associate. In 2013, he joined the National Institute of Technology, Arunachal Pradesh, India, and currently serves as an Assistant Professor there. His research interests include MOS amplifier design and optimization, current mode circuits, and design of transceiver circuit for high-speed signaling.

Paromita Bhattacharjee

Paromita Bhattacharjee obtained her BTech in electronics and communication engineering from the North Eastern Hill University, Shillong, India, in 2014. She has completed MTech in electronics design and manufacturing from the National Institute of Technology, Arunachal Pradesh, India, in 2016. Her research interests include MOS amplifier design and optimization. Email: [email protected]

Pinaki Chakraborty

Pinaki Chakraborty obtained his BSc and MSc degrees in physics from Vidyasagar University, West Bengal, India, in 2004 and 2006, respectively. He has completed his PhD in micro electronics from Jadavpur University, West Bengal, India, in 2010. Furthermore, he also did research work at IIT Kharagpur, West Bengal, India. In 2011, he joined the Department of Basic and Applied Science, National Institute of Technology, Arunachal Pradesh, India, and currently serves as an Assistant Professor. He has to his credit seven papers in international journals and 23 papers as conference proceeding. His research interest includes micro and nanoelectronics. Email: [email protected]

Bidyut K. Bhattacharyya

Bidyut K Bhattacharyya received his BSc degree in physics (with honors) from the Presidency College, Calcutta, West Bengal, India, MSc degree in physics from the Indian Institute of Technology Kanpur, India, and PhD degree in physics from the State University of New York at Buffalo, NY, USA, in 1976, 1978, and 1983, respectively. From 1984 to 2003, he worked at Intel Corporation Chandler, Arizona, USA, as Principal Engineer and then at Hillsboro, Oregon, USA, as Staff Engineer from 2003 to 2007. He is holding 27 patents and is author of more than 60 papers. Dr. Bhattacharyya’s PhD work is recognized as one of the greatest experiments to show the Lowest Density Liquid Ever Found in Nature. He was the recipient of IAA award by the founders of Intel Corporation Dr Andy Grove and Dr Gordon Moore. He was awarded the IEEE Grade in 2000 for his contributions to the electronic packaging. Email: [email protected]