103
Views
0
CrossRef citations to date
0
Altmetric
Articles

MOS Amplifier Design Methodology for Optimum Performance

, , &

References

  • F. Silveira, D. Flandre, and P. Jespers, “A gm/Id based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA,” IEEE J. Solid State Circuits, Vol. 31, no. 9, pp. 1314–9, Sep. 1996. doi: 10.1109/4.535416
  • A. I. A. Cunha, O. C. Gouveia-Filho, M. C. Schneider, and C. Galup-Montoro, “A current-based model for the MOS transistor,” in Proceedings of 1997 IEEE International Symposium on Circuits and Systems, 1997. ISCAS’97, Vol. 3, Jun. 1997, pp. 1608–11.
  • A. Cunha, M. Schneider, and C. Galup-Montoro, “An MOS transistor model for analog circuit design,” IEEE J. Solid State Circuits, Vol. 33, no. 10, pp. 1510–9, Oct. 1998. doi: 10.1109/4.720397
  • R. Oliveira Pinto, A. Cunha, M. Schneider, and C. Galup-Montoro, “An amplifier design methodology derived from a MOSFET current-based model,” in Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, 1998. ISCAS ‘98, Vol. 1, May 1998, pp. 301–4.
  • F. A. Farag, “CMOS amplifier design methodology for optimum slew rate,” in 11th Mediterranean Electrotechnical Conference, 2002. MELECON 2002, pp. 532–6.
  • B. Razavi, Design of Analog CMOS Integrated Circuits, 1st ed. New York: McGraw-Hill, 2001.
  • J. Ou, “gm/Id based noise analysis for CMOS analog circuits,” in IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 2011, pp. 1–4.
  • E. Alvarez and A. Abusleme, “Noise power normalisation: Extension of gm/Id technique for noise analysis,” Electron. Lett., Vol. 48, no. 8, pp. 430–2, Apr. 2012. doi: 10.1049/el.2011.3730
  • M. Fakhfakh, M. Loulou, and N. Masmoudi, “Optimizing performances of switched current memory cells through a heuristic,” Analog Integr. Circuits Signal Process., Vol. 50, no. 2, pp. 115–26, 2006. doi: 10.1007/s10470-006-9009-5
  • M. Kotti, A. Sallem, M. Fakhfakh, and M. Loulou, “A novel multi-objective algorithm: Application to the optimal sizing of current conveyors,” in XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), Oct. 2010, pp. 1–5.
  • R. J. Vanderbei, Linear Programming Foundations and Extensions. New York: Springer, 2001.
  • S. Boyd, S.-J. Kim, L. Vandenberghe, and A. Hassibi, “A tutorial on geometric programming,” Optimization Eng., Vol. 8, no. 1, pp. 67–127, 2007. doi: 10.1007/s11081-007-9001-7
  • P. Mandal and V. Visvanathan, “A new approach for CMOS op-amp synthesis,” in Twelfth International Conference on VLSI Design, Jan. 1999, pp. 189–94.
  • M. D. Hershenson, S. P. Boyd, and T. H. Lee, “Optimal design of a CMOS op-amp via geometric programming,” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., Col. 20, no. 1, pp. 1–21, Jan. 2001. doi: 10.1109/43.905671
  • P. Mandal and V. Visvanathan, “CMOS op-amp sizing using a geometric programming formulation,” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., vol. 20, no. 1, pp. 22–38, Jan. 2001. doi: 10.1109/43.905672
  • C. Buchanan, “Techniques for solving nonlinear programming problems with emphasis on interior point methods and optimal control problems,” M.Phil. thesis, University of Edinburgh, 2007.

Reprints and Corporate Permissions

Please note: Selecting permissions does not provide access to the full text of the article, please see our help page How do I view content?

To request a reprint or corporate permissions for this article, please click on the relevant link below:

Academic Permissions

Please note: Selecting permissions does not provide access to the full text of the article, please see our help page How do I view content?

Obtain permissions instantly via Rightslink by clicking on the button below:

If you are unable to obtain permissions via Rightslink, please complete and submit this Permissions form. For more information, please visit our Permissions help page.