Compact AC Modeling of Eddy Current for Cylindrical Through Silicon Via

Abstract

At high frequency, a magnetic field induced eddy current primarily dominates the performance of a through silicon via (TSV) based 3D interconnects. In this regard, this paper considered a copper (Cu) based cylindrical-shaped TSV by considering the impact of eddy current on the silicon substrate, depletion layer, and neighboring TSVs at a high frequency. Further, an equivalent novel resistance-inductance-conductance-capacitance (RLGC) circuit model is presented in order to investigate the crosstalk induced delay under the consideration of eddy current. Therefore, a closed-form analytical expression of the eddy resistance is derived using the Quasi-magnetostatic field's theory. A unique eddy based pi-type distributed RLGC model is used to analyze the in-phase and out-of-phase crosstalk delay using three coupled driver-via-load (DVL) at 32 nm technology. Using industry-standard HSPICE circuit simulations, the crosstalk induced delay is obtained for 20 to 500 GHz operating frequencies at different via heights ranging from 30 to 120 μm. It has been observed that the overall rate of change in out-phase and in-phase crosstalk-induced delay with considering eddy effect are 21.8% and 14.5%, respectively for via height of 120 μm.

KEYWORDS:

• Bump
• Crosstalk-induced delay
• Depletion layer
• Eddy resistance
• Inter-metal dielectric (IMD)
• Metal oxide semiconductor (MOS) effect
• Propagation delay
• Skin effect
• Through silicon via (TSV)

Disclosure statement

No potential conflict of interest was reported by the author(s).

Additional information

Notes on contributors

Chopali Chanchal Sahu

Chopali Chanchal Sahu received the BE degree in electronics & telecommunication engineering from Government Engineering College, Jagdalpur, in 2017, and she is currently pursuing MTech degree from DSPM IIIT, Naya Raipur, India. Her current research interest is in the area of cylindrical and tapered shaped TSV as an interconnection technique in 3D IC. Email: [email protected]

Vijay Rao Kumbhare

V R Kumbhare received his BTech degree in electronics and telecommunication engineering from the National Institute of Technology, Raipur, India in 2008, and MTech degree with specialization in telecommunication system engineering (TSE) under Electronics and Electrical Communication Engineering Department from the Indian Institute of Technology, Kharagpur, West Bengal, India, in 2011. He worked as an assistant professor for more than 5 years. He is currently working toward his PhD degree from Dr Shyama Prasad Mukherjee International Institute of Information Technology Naya Raipur, India. He has published in more than 6 SCI journals and 8 reputed conference papers. He is an active IEEE Student Member. He has attended several workshops and conferences and is an active reviewer of reputed IEEE Transactions on Nanotechnology, IET Biotechnology. He has co-authored a text book titled ‘Introduction to Microelectronics to Nanoelectronics: Design and Technology’ (Florida, Boca Raton: CRC Press, 2020). His current research interests are in the area of graphene nanoribbon, carbon nanotube, and optical-based on-chip VLSI inter­connects, and emerging nanomaterials. Email: [email protected]

Manoj Kumar Majumder

Manoj Kumar Majumder received his PhD from Microelectronics and VLSI group at Indian Institute of Technology, Roorkee, India. Currently, he is working as assistant professor in Department of Electronics and Communication Engineering, DSPM IIIT, Naya Raipur. He has authored more than 35 papers in peer-reviewed international journals and more than 50 papers in international conferences. He has co-authored three books titled ‘Introduction to Microelectronics to Nanoelectronics: Design and Technology’ (CRC Press, November 2020), ‘Through Silicon Vias: Materials, Models, Design and Performance’ (CRC Press, November 2016), ‘Carbon Nanotobe Based VLSI Interconnects-Analysis and Design’ (New York, NY, USA: Springer, 2014) and also a book-chapter published by CRC Press. He has received ‘Best Research Awards’ ‘International Scientist Awards in Engineering, Medicine and Statistics’ from VDGOOD Technology Factory in September 2020. His name has been listed in Marquis Who’s Who in the World. He is a Senior Member of IEEE and IEEE Circuits and Systems Society. His current research interests include the area of low power VLSI circuits and systems designing, modelling of VLSI device and circuit performance parameters, emerging electronics, carbon nanotube and graphene nanoribbon based VLSI interconnects and through silicon vias, nanomaterials and their application.