Effects of Area Ratio on the Characteristics of Metal-Ferroelectric-Metal-Insulator-Semiconductor Field-Effect-Transistors (MFMIS FETs)

Abstract

The switching physics of ferroelectric, series capacitance theory and Pao and Sah’s double integral are used for describing the polarization-voltage (P-V) characteristic of ferroelectric layer, capacitance-voltage (C-V) characteristic of MFMIS capacitor, and drain current-gate voltage (I_D-V_GS) and drain current-drain voltage (I_D-V_DS) characteristics of MFMIS FET. The effects of the area ratio on the P-V, C-V, I_D-V_GS, and I_D-V_DS characteristics are discussed. The results indicate that with the increase of the area ratio, the P-V characteristic, memory windows of C-V and I_D-V_GS characteristics become saturated, while the drain current ON/OFF ratio and applied voltage for saturated memory window decrease.

Keywords:

• Area ratio
• P-V characteristic
• C-V characteristic
• drain current
• MFMIS FETs

Additional information

Funding

This work was supported by the NNSF of China under Grant 51502087 and Grant 61841103; Scientific Research Fund of Hunan Provincial Education Department under Grant 15B056 and Grant 17A048; Hunan Provincial Innovation Foundation for Postgraduate under Grant CX2018B812; and Startup Fund for doctorate of Hunan Institute of Engineering.