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Original Articles

Analog performance of double gate SOI transistors

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Pages 1-18 | Received 12 Mar 2005, Accepted 21 Sep 2005, Published online: 19 Aug 2006

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Jay Pathak & Anand Darji. (2019) Analysis of 14nm technology node In0.53Ga0.47As nFinFET integrated with In0.52Al0.48As cap layer for high-speed circuits. International Journal of Electronics 106:10, pages 1514-1529.
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K. K. Islam & Noriko Sato. (2013) Protected Sal Forest and Livelihoods of Ethnic Minorities: Experience From Bangladesh. Journal of Sustainable Forestry 32:4, pages 412-436.
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Articles from other publishers (9)

V Vijayvargiya, B S Reniwal, P Singh & S K Vishvakarma. (2017) Impact of device engineering on analog/RF performances of tunnel field effect transistors. Semiconductor Science and Technology 32:6, pages 065005.
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V. Vijayvargiya, B.S. Reniwal, P. Singh & S.K. Vishvakarma. (2016) Analogue/RF performance attributes of underlap tunnel field effect transistor for low power applications. Electronics Letters 52:7, pages 559-560.
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Deepika Gupta & Santosh Kumar Vishvakarma. (2016) Improved Short-Channel Characteristics With Long Data Retention Time in Extreme Short-Channel Flash Memory Devices. IEEE Transactions on Electron Devices 63:2, pages 668-674.
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M. S. Alam, Abdul Barik & G. A. Armstrong. (2012) Investigations of analog/RF performance for underlap graphene nano-ribbon field effect transistor (GNRFET). Investigations of analog/RF performance for underlap graphene nano-ribbon field effect transistor (GNRFET).
K. K. Islam, Marjanke Hoogstra, M. O. Ullah & Noriko Sato. (2012) Economic contribution of participatory agroforestry program to poverty alleviation: a case from Sal forests, Bangladesh. Journal of Forestry Research 23:2, pages 323-332.
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Hai-qing Xie, Yun Zeng, Jian-ping Zeng & Tai-hong Wang. (2011) Analysis and simulation of lateral PIN photodiode gated by transparent electrode fabricated on fully-depleted SOI film. Journal of Central South University 18:3, pages 744-748.
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Chetan D. Parikh, D. Nagchoudhuri & Amara Amara. (2011) A 0.7-V rail-to-rail buffer amplifier with double-gate MOSFETs. A 0.7-V rail-to-rail buffer amplifier with double-gate MOSFETs.
M. S. Alam, A. Kranti & G. A. Armstrong. (2009) An efficient neural network approach for nanoscale FinFET modelling and circuit simulation. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields 22:5, pages 379-393.
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Jiale Liang, Han Xiao, Ru Huang, Pengfei Wang & Yangyuan Wang. (2008) Design optimization of structural parameters in double gate MOSFETs for RF applications. Semiconductor Science and Technology 23:5, pages 055019.
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