Analog performance of double gate SOI transistors

References

• Alam , MS . 2002 . “RF Modelling of deep sub-micron CMOS and heterojunction bipolar transistor for wireless communication systems” . UK : Queen's University of Belfast . PhD thesis
   Google Scholar
• Alam , MS and Armstrong , GA . 2004 . Extrinsic parameter extraction and RF modelling of CMOS . Solid-State Electronics , 48 : 669 – 674 .
   Web of Science ®Google Scholar
• ATLAS User's Manual-Device Simulation Software: SILVACO International Inc . 2004 .
   Google Scholar
• Balasubramanian , S , Chang , L , Nikolic , B and King , T-J . 2003 . “Circuit-performance implications for double-gate MOSFET scaling below 25 nm” . In Proc. Silicon Nano Electronics Workshop 16 – 17 .
   Google Scholar
• Bansal , A , Paul , BC and Roy , K . 2005 . Modelling and optimization of fringing capacitance of nanoscale DGMOS devices . IEEE Trans. Electron Devices , 52 : 256 – 262 .
   Web of Science ®Google Scholar
• Beranger , CF , Skotnicki , T , Monfray , S , Carriere , N and Boeuf , F . 2004 . Requirements for ultra-thin devices and new materials for the CMOS roadmap . Solid-State Electronics , 48 : 961 – 967 .
   Web of Science ®Google Scholar
• Boots , HMJ , Doornbos , G and Heringa , A . 2004 . Scaling of characteristics frequencies in RF CMOS . IEEE Trans. Electron Devices , 50 : 2102 – 2108 .
   Google Scholar
• Chen , Q , Agrawal , B and Meindl , JD . 2002 . A comprehensive analytical subthreshold swing (S) model for double gate devices . IEEE Trans. Electron Devices , 49 : 1086 – 1090 .
   Web of Science ®Google Scholar
• Chen , Q , Harell II , EM and Meindl , JD . 2003 . A physical short-channel threshold voltage model for undoped symmetric double-gate MOSFETs . IEEE Trans. Electron Devices , 50 : 1631 – 1637 .
   Web of Science ®Google Scholar
• Dambrine , G , Raynaud , C , Lederer , D , Dehan , M , Rozeaux , O , Vanmackelberg , M , Danneville , F , Lepilliet , S and Raskin , J-P . 2003 . What are the limiting parameters of deep-submicron MOSFETs for high frequency applications? . IEEE Electron Device Letters , 24 : 189 – 191 .
   Web of Science ®Google Scholar
• Doris , B . 2003 . Device design considerations for ultra-thin SOI MOSFETs . IEDM , : 631 – 634 .
   Google Scholar
• Eminente , S , Alessandrini , M and Fiegnahang , C . 2004 . Comparative analysis of the RF and noise performance of bulk and single-gate ultra-thin SOI MOSFETs by numerical simulation . Solid-State Electronics , 48 : 543 – 549 .
   Web of Science ®Google Scholar
• Ernst , T , Cristoloveanu , S , Ghibaudo , G and Ouisse , T . 2003 . Ultimate thin double-gate SOI MOSFETs . IEEE Trans. Electron Devices , 50 : 830 – 838 .
   Web of Science ®Google Scholar
• Fossum , JG , Ge , L and Chiang , MH . 2002 . Speed superiority of scaled double-gate CMOS . IEEE Trans. Electron Devices , 49 : 808 – 811 .
   Web of Science ®Google Scholar
• Fossum , JG , Chowdhury , MM , Trivedi , VP , King , TJ , Choi , YK , An , J and Yu , B . 2003 . Physical insight on design and modelling of nanoscale FinFETs . IEEE IEDM , : 679 – 682 .
   Google Scholar
• International Technology Road Maps for Semiconductor (ITRS) 2003 edition, available from http://public.itrs.net http://public.itrs.net (http://public.itrs.net)
   Google Scholar
• Jankovic , ND and Armstrong , GA . 2004 . Performance comparison of double gate SOI MOSFETs on highly doped and near intrinsic layers . Microelectronics Journal , 35 : 647 – 654 .
   Web of Science ®Google Scholar
• Kilchytska , V . 2003 . Influence of device engineering on the analog and RF performances of SOI MOSFETs . IEEE Trans. Electron Devices , 50 : 577 – 588 .
   Web of Science ®Google Scholar
• Kim , K , Fossum , JG and Chuang , CT . 2004 . Process/physics-based threshold voltage for nano-scaled double gate devices . Int. Journal of Electronics , 91 : 139 – 148 .
   Web of Science ®Google Scholar
• Lee , TH . 2004 . “ The design of CMOS radio frequency integrated circuits ” . Cambridge University Press .
   Google Scholar
• Lim , TC and Armstrong , GA . 2005 . Parameter sensitivity for optimal design of 65 nm node double gate SOI transistors . Solid-State Electronics , 49 : 1034 – 1043 .
   Web of Science ®Google Scholar
• Luyken , RJ , Stadele , M , Rosner , W , Schulz , T , Hartwich , J , Dreeskornfeld , L and Risch , L . 2002 . Perspectives of fully-depleted SOI transistors down to 20 nm gate length . IEEE International SOI Conference , : 137 – 139 .
   Google Scholar
• Luyken , RJ , Schulz , T , Hartwich , J , Dreeskornfeld , L , Städele , M and Rösner , W . 2003 . Design considerations for fully depleted SOI transistors in the 25–50 nm gate length regime . Solid-State Electronics , 47 : 1199 – 1203 .
   Web of Science ®Google Scholar
• Narsimhulu , K , Desai , MP , Narendra , SG and Ramgopal Rao , V . 2004 . The effect of LAC doping on submicrometer transistor capacitances and its influence on device RF performance . IEEE Trans. Electron Devices , 51 : 1416 – 1423 .
   Web of Science ®Google Scholar
• Pavanello , MA , Martino , JA and Flandre , D . 2002 . Analog circuit design using graded-channel silicon-on-insulator nMOSFETs . Solid-State Electronics , 46 : 1215 – 1225 .
   Web of Science ®Google Scholar
• Shenoy , RS and Saraswat , KC . 2003 . Optimization of extrinsic source/drain resistance in ultrathin body double-gate FETs . IEEE Transaction On Nano Technology , 2 : 265 – 270 .
   Google Scholar
• Shang , H and White , MH . 2000 . An ultra-thin midgap gate FDSOI MOSFET . Solid-State Electronics , 44 : 1621 – 1625 .
   Web of Science ®Google Scholar
• Suryagandh , SS , Garg , M and Woo , JCS . 2004 . A device design methodology for sub-100-nm SOC applications using bulk and SOI MOSFETs . IEEE Trans. Electron Devices , 51 : 1122 – 1128 .
   Web of Science ®Google Scholar
• Trivedi , VP and Fossum , JG . 2003 . Scaling fully depleted SOI CMOS . IEEE Trans. Electron Device , 50 : 2095 – 2103 .
   Web of Science ®Google Scholar
• Wong , M and Shi , X . 2004 . On the threshold volatge of symmetrical DG MOS capacitor with intrinsic silicon body . IEEE Tran. Electron Devices , 51 : 1600 – 1604 .
   Web of Science ®Google Scholar