3D Double-Gate Junctionless Nanowire Transistor-Based Pass Transistor Logic Circuits for Digital Applications

Abstract

We investigate the circuit performance of the junctionless nanowire transistor. We have demonstrated pass transistor-based logic gates using the junctionless transistor. Pass transistor-based basic logic gates: AND, OR, XOR are designed using only the n-type junctionless nanowire transistor with HfO₂ gate dielectric. Simulations of these circuits have been studied and analyzed under a mixed-mode environment. Outcomes of the analysis show that 3D dual gate junctionless nanowire transistor with 20 nm gate length well performed for pass transistor logic. In addition, a junctionless nanowire transistor-made multiplexer has also been studied and found to perform well. A high-k gate dielectric was used for all junctionless transistors as the higher k value improves the device characteristics and circuit performances. Our study also shows that the junctionless nanowire transistor-based pass transistor logics for digital circuit perform well.

KEYWORDS:

• High-k dielectrics
• Junctionless transistor
• Logic gates
• Mixed-mode simulation
• Pass transistor logic

Additional information

Funding

The authors acknowledge the TECHNICAL EDUCATION QUALITY IMPROVEMENT PROGRAMME (TEQIP) [PHASE-III] grant for facilitating the Synopsys TCAD Tool in the Department of ECE at National Institute of Technology Silchar, India to carry out this work.

Notes on contributors

Achinta Baidya

Achinta Baidya (M’11) received his BTech in electronics and communication engineering from Guru Nanak Institute of Technology, India, in 2009; MTech in microelectronics and VLSI design form NIT Silchar, India, in 2011 and the PhD from National Institute of Technology, Silchar. Corresponding author. Email: [email protected]; [email protected]

Trupti R. Lenka

Trupti Ranjan Lenka (M’07) received his BE in electronics and communication engineering from the National Institute of Science and Technology, Berhampur, India, in 2000; MTech in very large scale integration design from Uttar Pradesh Technical University, Lucknow, India, in 2007, and PhD in microelectronics from Sambalpur University, Odisha, India, in 2012. Email: [email protected]

Srimanta Baishya

Srimanta Baishya (M’05) received BE in electrical engineering from Assam Engineering College, Guwahati, India, in 1989, MTech in electrical engineering from IIT Kanpur, Kanpur, India, in 1994, and PhD from Jadavpur University, Kolkata, India, in 2007. Email: [email protected]