Density Gradient Study on Junctionless Stack Nano-Sheet with Stack Gate Oxide for Low Power Application

Abstract

In this study, the Quad gate with gate oxide stack for 3 fins which is a vertically stacked device for the classical model and added the quantum mechanical effects to classical refers to the quantum model and both models have been explored for its analog performance. The analog and RF parameters for device performance like trans-conductance (gm), output conductance (gd), intrinsic gain (Av), and cut-off frequency (ft) are evaluated using a Visual TCAD tool. The simulation result reveals that a capacitance value for classical and quantum model (in the order of 10−19) which minimizes ON state delay and making the device suitable for fast switching applications. The AC analysis of the device demonstrates quite a high cut off frequency of 0.167 THz for classical model and 6.6 THz for Quantum model and a remarkable trans-conductance (Gm) of 23 µS. Furthermore, the P-type device response of the same has been studied extensively.

KEYWORDS:

• Fin stack
• Gate oxide stack
• High-k
• Quad gate
• Quantum mechanical effects

Additional information

Notes on contributors

M. Prasad

M Prasad received his BE degree in electronics and communication engineering from VTU, Belgaum, Karnataka, India, in 2009 and MTech degree in VLSI design and embedded system from VTU, Belgaum, Karnataka, India, in 2013. He is currently pursuing his PhD degree in the Department of Electronics and Communication Engineering, Sri Jayachamarajendra College of Engineering, Mysore. His field of research is low power VLSI design.

U. B. Mahadevaswamy

U B Mahadevaswamy received his BE degree in electronics engineering from Mysore University, Mysore, Karnataka, India in 1988 and MTech degree in industrial electronics, NITK Surthkal, Mangalore University, Karnataka in 1995 and PhD degree in electronics engineering from Mysore University, Mysore, Karnataka, India in 2013, respectively. He presently works as associate professor in Electronics and Communication Department of Sri Jayachamarajendra College of Engineering, Mysore. His Research interests include analog and mixed mode VLSI circuits. Email: [email protected]