A Novel Nanometric Parity-Preserving Reversible Carry-Lookahead Adder

ABSTRACT

During recent years, reversible logic received important attention in cryptography, optical processing, quantum computing, and nanotechnology. Among the reversible computation units, the adder unit is considered the most fundamental computation unit to build a quantum computing system. Due to its low latency, the reversible carry-lookahead adder is mostly used and considered. Parity preserving is also one of the oldest methods for error recognition in digital systems. In this article, we offer new proposals for the nanometric parity-preserving reversible 2-bit carry-lookahead adder. Compared with previous designs, we will demonstrate that our designs would be optimal in the number of garbage outputs, constant inputs, and quantum costs. In order to design circuits at a higher level, we also offer new proposals for the nanometric parity-preserving reversible 4-bit carry-lookahead adder. Since previous proposals that were presented as 4-bit did not have the reversible parity-preserving property, we proceeded with our research.

KEYWORDS:

• Carry-lookahead adder
• Nanometric circuits
• Parity preservation
• Quantum computing
• Reversible logic
• Reversible gate

Disclosure statement

No potential conflict of interest was reported by the authors.

Additional information

Notes on contributors

Saeedeh Asri

Saiedeh Asri obtained her BSc in hardware computer from the University of Ardabil, Iran and received master degree in computer system architecture from Faculty of Technical & Engineering, Department of computer Engineering, Tabriz Branch, IAU University,Tabriz, Iran in 2014. Her current research interest areas include quantum computing, reversible logic design and nanometric circuits.

Majid Haghparast

Majid Haghparast received his BSc in computer hardware engineering in 2003. He received his MSc. and Ph.D. degrees in computer architecture in 2006 and 2009, respectively. Since 2007, he has been affiliated with the Computer Engineering Faculty, Yadegar-e-Imam Khomeini (RAH) Branch, IAU University, Tehran, Iran. He has published more than 50 research papers in various international journals and conferences. His research interests include wireless sensor networks, cloud computing, reversible logic and computer arithmetic. Dr. Haghparast is on the panel of reviewers for various international journals.

E-mail: [email protected]