110
Views
1
CrossRef citations to date
0
Altmetric
Articles

A Novel Nanometric Parity-Preserving Reversible Carry-Lookahead Adder

& ORCID Icon

REFERENCES

  • R. Landauer, “Irreversibility and heat generation in the computing process,” IBM J. Res. Dev., vol. 5, no. 3, pp. 183–191, Jul. 1961.
  • C. Bennett, “Logical reversibility of computation,” IBM J. Res. Dev., vol. 17, no. 6, pp. 525–532, Nov 1973.
  • H. Thapliyal, Progress in Reversible Processor Design: A Novel Methodology for Reversible Carry Look-Ahead Adder, in Transactions on Computational Science XVII. Springer, 2013, pp. 73–97.
  • M. Perkowski, “A general decomposition for reversible logic,” Proc. RM, vol. 1, pp. 119–138, Aug. 2001.
  • M. Islam, “Fault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders,” in International Conference on Advances in Computational Tools for Engineering Applications, ACTEA'09, Lebanon, Nov. 2009, pp. 396–401.
  • H. Thapliyal and M. Srinivas, “Novel reversible TSG gate and its application for designing components of primitive reversible/quantum ALU,” in 2005 Fifth International Conference on Information, Communications and Signal Processing, India, Jan. 2005, pp. 1–5.
  • M. Haghparast, “Optimized reversible multiplier circuit,” J. Circuits Syst. Comput., vol. 18, no. 02, pp. 311–323, Mar. 2009.
  • B. Parhami, “Fault-tolerant reversible circuits,” in Fortieth Asilomar Conference on Signals, Systems and Computers, 2006. ACSSC'0, Oct. 2006.
  • M. Haghparast and K. Navi, “A novel fault tolerant reversible gate for nanotechnology based systems,” Am. J. Appl. Sci., vol. 5, no. 5, p. 519, pp. 519–523, Apr. 2008.
  • M. Islam and Z. Begum, “Reversible logic synthesis of fault tolerant carry skip BCD adder,” arXiv preprint arXiv:1008.3288, Aug. 2010.
  • S. Babazadeh and M. Haghparast, “Design of a nanometric fault tolerant reversible multiplier circuit,” J. Basic Appl. Sci. Res., vol. 2, no. 2, pp. 1355–1361, Feb. 2012.
  • K.-W. Cheng and C.-C. Tseng, “Quantum plain and carry look-ahead adders,” arXiv preprint quant-ph/0206028, May 2002.
  • H. Thapliyal and M. Srinivas, “A novel reversible TSG gate and its application for designing reversible carry look-ahead and other adder architectures,” in Advances in Computer Systems Architecture, India: Springer, Oct. 2005, pp. 805–817.
  • L. Jamal, M. Shamsujjoha, and H. Babu, “Design of optimal reversible carry look-ahead adder with optimal garbage and quantum cost,” Int. J. Eng. Technol., vol. 2, no. 1, pp. 44–50, Jan. 2012.

Reprints and Corporate Permissions

Please note: Selecting permissions does not provide access to the full text of the article, please see our help page How do I view content?

To request a reprint or corporate permissions for this article, please click on the relevant link below:

Academic Permissions

Please note: Selecting permissions does not provide access to the full text of the article, please see our help page How do I view content?

Obtain permissions instantly via Rightslink by clicking on the button below:

If you are unable to obtain permissions via Rightslink, please complete and submit this Permissions form. For more information, please visit our Permissions help page.