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Integrated Ferroelectrics
An International Journal
Volume 65, 2004 - Issue 1
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Original Articles

Multiple Bit Operation of MFISFET With Pt/SrBi2Ta2O9/Y2O3/Si Gate Structure

SUN IL SHIM Semiconductor Device Lab., Korea Institute of Science & Technology (KIST), Seoul, Korea, 130-650
,
YOUNG SUK KWON Semiconductor Device Lab., Korea Institute of Science & Technology (KIST), Seoul, Korea, 130-650
,
IK SOO KIM Semiconductor Device Lab., Korea Institute of Science & Technology (KIST), Seoul, Korea, 130-650
,
SEONG-IL KIM Semiconductor Device Lab., Korea Institute of Science & Technology (KIST), Seoul, Korea, 130-650
,
YONG TAE KIM Semiconductor Device Lab., Korea Institute of Science & Technology (KIST), Seoul, Korea, 130-650
&
JUNG HO PARK Department of Electronics Engineering, Korea University, Anam-dong, Sungbuk-ku, Seoul, Korea, 136-701
Pages 203-211 | Received 01 May 2004, Accepted 01 Aug 2004, Published online: 11 Aug 2010
 
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Abstract

A single transistor type ferroelectric memory with multiple bit operation was presented. This cell has a metal ferroelectric insulator semiconductor field effect transistor structure. Y2O3 thin film was used as a buffer insulating layer to improve the memory characteristics and SrBi2Ta2O9 was used as a ferroelectric gate material. The multi-level characteristics of four levels with one order of drain current difference were measured according to the writing voltage step of two volt. This multi-level memory cell enables to increase the density of memory in the same space and lower the cost.

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