Design and Optimization of Reversible Arithmetic Unit Using Modified Gate Diffusion Input Logic

References

• Abiri, E., & Darabi, A. (2020). Reversible logic- based magnitude comparator (RMC) circuit using modified-GDI technique for motion detection applications in image processing. Microprocessors and Microsystems, 72, 102928. https://doi.org/10.1016/j.micpro.2019.102928
   Web of Science ®Google Scholar
• Abiri, E., Darabi, A., Salehi, M. R., & Sadeghi, A. (2020). Optimized gate Diffusion input method-based reversible magnitude Arithmetic unit using non-dominated sorting genetic algorithm II. Circuits, Systems, and Signal Processing, 39(9), 4516–4551. https://doi.org/10.1007/s00034-020-01382-1
   Web of Science ®Google Scholar
• Abiri, E., Darabi, A., & Salem, S. (2018). Design of multiple-valued logic gates using gate- diffusion input for image processing applications. Computers & Electrical Engineering, 69, 142–157. https://doi.org/10.1016/j.compeleceng.2018.05.019
   Web of Science ®Google Scholar
• Bevara, V., Bevara, S., Chandra Prasad, J., & Krishna, R. V. V. M. (April 4, 2023). Ultra low power reversible Arithmetic Processor based on quantum dot Cellular Automata. Authorea. https://doi.org/10.22541/au.168060949.97971049/v1
   Google Scholar
• Binu Siva Singh, S. K., & Karthikeyan, K. V. (2023). Multiple-controlled Toffoli and multiple-controlled Fredkin reversible logic gates-based reversible Synchronous Counter design. IETE Journal of Research, 1–14. https://doi.org/10.1080/03772063.2023.2228747
   Web of Science ®Google Scholar
• Bolhassani, A., & Haghparast, M. (2017). Optimized designs of reversible arithmetic logic unit. Turkish Journal of Electrical Engineering and Computer Sciences, 25(2), 1137–1146. Article 37 https://doi.org/10.3906/elk-1505-223
   Web of Science ®Google Scholar
• Book: M. Morris Mano. (1993) . “Computer System architecture” in Engle Wood Cliffs. NJ, Prentice-Hall.
   Google Scholar
• Dey, K. K., Kumar, A. and Bayoumi, M. (2020). A reversible-logic based architecture for artificial neural network. 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 505–508, https://doi.org/10.1109/MWSCAS48704.2020.9184662.
   Google Scholar
• Dixit, A. (2012, June). Vinod Kapse, Arithmetic & logic unit (ALU) design using reversible control unit. International Journal of Engineering and Innovative Technology (IJEIT), 1(6), 55–60.
   Google Scholar
• Fredkin, E., & Toffoli, T. (1982). Conservative logic. International Journal of Theoretical Physics, 21(3–4), 219–253. https://doi.org/10.1007/BF01857727
   Web of Science ®Google Scholar
• Guan, Z., Li, W., Ding, W., Hang, Y. and Ni, L. (2011). An Arithmetic logic unit design based on reversible logic gates. Proceedings of 2011 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, Victoria, BC, Canada, (pp. 925–931). https://doi.org/10.1109/PACRIM.2011.6033020
   Google Scholar
• Kamaraj, A., & Marichamy, P. (2017). Design and implementation of arithmetic and logic unit (ALU) using novel reversible gates in quantum cellular automata. Proceedings of the 2017 4th International Conference on Advanced Computing and Communication Systems (ICACCS) Coimbatore, India, (pp.1–8). https://doi.org/10.1109/ICACCS.2017.8014578
   Google Scholar
• Khatter, P., Pandey, N., & Gupta, K. (2018, September). An arithmetic and logical unit using reversible gates. Proceedings of the 2018 International Conference on Computing, Power and Communication Technologies (GUCON) (pp. 476–480). IEEE.
   Google Scholar
• Morgenshtein, A. F., & Wagner, I. A. (2002). Gate-diffusion input (GDI): a power- efficient method for digital combinatorial circuits””. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10(5), 566–581. https://doi.org/10.1109/TVLSI.2002.801578
   Web of Science ®Google Scholar
• Narayan Mukherjee, D., Panda, S., & Maji, B. (2021). Design and Optimization of Reversible Logic Based Magnitude Comparator Using Gate Diffusion Input Technique. IETE Journal of Research, 69(6), 3625–3637. https://doi.org/10.1080/03772063.2021.1912658
   Web of Science ®Google Scholar
• Naz, S. F. and Shah, A. P. Reversible gates: A paradigm shift in computing. in IEEE Open Journal of Circuits and Systems. https://doi.org/10.1109/OJCAS.2023.3305557.
   Google Scholar
• Nikhil, G., Sharanya, B., Reddy, P. B. and Vidyadhar, R. P. (2021). Reversible 2:4 Decoder Using Universal Fredkin Gate. 2021 6th International Conference on Communication and Electronics Systems (ICCES), Coimbatre, India, pp. 173–176, https://doi.org/10.1109/ICCES51350.2021.9489226.
   Google Scholar
• Peres, A., & Peres. (1985). Reversible logic and quantum computers. Physical Review: A, 32(6), 3266–3276. https://doi.org/10.1103/PhysRevA.32.3266
   PubMed Web of Science ®Google Scholar
• Praveen Kumar, Y. G., Kariyappa, B. S., Shashank, S. M., & Bharath, C. N. (2020). Performance analysis of multipliers using modified gate diffused input technology. IETE Journal of Research, 68(5), 3887–3899. https://doi.org/10.1080/03772063.2020.1782778
   Web of Science ®Google Scholar
• Samrin, S. S., Patil, R., Itagi, S., Chetti, S. C., & Tasneem, A. (2022). Design of logic gates using reversible gates with reduced quantum cost. Global Transitions Proceedings, 3(1), 136–141. ISSN 2666-285X https://doi.org/10.1016/j.gltp.2022.04.011
   Google Scholar
• Sasamal, T. N., Mohan, A., & Singh, A. K. (2018). Efficient design of reversible logic ALU using coplanar quantum-dot cellular automata. Journal of Circuits, Systems & Computers, 27(2), 1850021. https://doi.org/10.1142/S0218126618500214
   Web of Science ®Google Scholar
• Selim Al Mamun, M., & Menville, D. (2013). Quantum Cost Optimization for Reversible Sequential Circuit. (IJACSA) International Journal of Advanced Computer Science & Applications, 4(12). https://doi.org/10.14569/IJACSA.2013.041203
   Google Scholar
• Shoba, M., & Swamy Niketan, R. (2016). GDI based full adders for energy efficient arithmetic applications. Engineering Science and Technology, an International Journal, 19(1), 485-496,ISSN 2215–0986. https://doi.org/10.1016/j.jestch.2015.09.006
   Google Scholar
• Sourabh Sanyal, T., & Rashmi, W. (2022, December 31). Design of a Reversible Full Adder Using Quantum Cellular Automata. The Eurasia Proceedings of Science Technology Engineering and Mathematics, 21, 500–505. https://doi.org/10.55549/epstem.1227552
   Google Scholar
• Surekha, M. (2017). Efficient approaches for designing quantum costs of various reversible gates. International Journal of Engineering Studies, ISSN 0975-6469, 9(1), 57–78. https://doi.org/10.37622/IJES/9.1.2017.57-78
   Google Scholar
• Swathi, M. and Rudra, B. (2021). Implementation of reversible logic gates with quantum gates. 2021 IEEE 11th Annual Computing and Communication Workshop and Conference (CCWC), NV, USA, pp. 1557–1563, https://doi.org/10.1109/CCWC51732.2021.9376060.
   Google Scholar
• Swetha, S., & Begum, M. A. (2017). Design of high speed, area optimized and low power Arithmetic and logic unit. Advances in Industrial Engineering and Management, 6(1), 26–31.
   Google Scholar
• Swetha, S., Reddy, N. S. S., & Hemalatha, R. (2017). Optimize design of full subtractor using 45nm technology. International Research Journal of Science and Engineering, 5(5), 71–75. ISSN: 2322-0015, UGC Approved Journal No. 63628.
   Google Scholar
• Tyagi, P., Kumar Singh, S., & Dua, P. (2021). Ultra-low power 8- transistor modified gate Diffusion input carbon nano-tube field effect transistor full adder. IETE Journal of Research. https://doi.org/10.1080/03772063.2021.1962746
   Web of Science ®Google Scholar
• Vandana Shukla, O. P. S., Mishra, G. R., & Tiwari, R. K. (2018). Reversible realization of N-bit Arithmetic circuit for low power loss ALU applications. Procedia Computer Science, 125, 847–854. ISSN 1877-0509. https://doi.org/10.1016/j.procs.2017.12.108
   Google Scholar