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Signals, data and communications

Fast test generation and partial testing for combinational logic circuits

Pages 739-746 | Received 27 Oct 1986, Accepted 10 Nov 1986, Published online: 24 Feb 2007

REFERENCES

  • et al. , 1972 , Path sensitization, partial boolean difference and automatic fault diagnosis. I.E.E.E, Transactions on Computers , 21 , 189 – 195 .
  • et al. , 1983 , On the acceleration of test generation algorithms. I.E.E.E. Transactions on Computers , 32 , 1137 – 1144 .
  • LALA , P. K. , 1985 , Fault Tolerant & Fault Testable Hardware Design ( London Prentice/Hall International, Inc. ).
  • et al. , 1975 , The weighted random test-pattern generator. I.E.E.E. Transactions on Computers , 24 , 695 – 700 .
  • et al. , 1968 , Analyzing errors with the boolean difference. I.E.E.E. Transactions on Computers , 17 , 676 – 683 .
  • et al. , 1982 , Design for testability—a survey. I.E.E.E. Transactions on Computers , 31 , 2 – 15 .

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