References
- AFGHAHI , M. , and SVENSSON , C. , 1992 , Performance of synchronous and asynchronous schemes for VLSI systems . IEEE Transactions on Computers , 41 , 858 – 872 .
- BELLIDO , M. J. , 1994 , Biestables CMOS VLSI bajo entradas asincronas problemas aplicaciones . Ph.D. thesis , Universidad de Sevilla .
- BELLIDO , M. J. , VALENCIA , M. , ACOSTA , A. J. , BARRIGA , A. , HUERTAS , J. L. ,DOMJNGUEZ-CASTRO R., 1993 , A new faster method for calculating the resolution coefficient of CMOS latches design of an optimum latch . Proceedings of the 26th IEEE International Symposium on Circuits and Systems , pp. 2019 – 2022 .
- CALVO , J. , VALENCIA , M. , and HUERTAS , J. L. , 1991 , Metastable operation in RS nip-flops . International Journal of Electronics , 70 ( 6 ), 1073 – 1091 .
- CHANEY , T. J. , 1983 , Measured flip-flop responses to marginal triggering . IEEE Transactions on Computers , 32 , 1207 – 1209 .
- CHANEY , T. J. , and MOLNAR , C. E. , 1973 , Anomalous behaviour of synchroniser and arbiter-circuits . IEEE Transactions on Computers , 11 , 421 – 422 .
- HOHL , J. , LARSEN , R. W. , and SCHOOLEY , L. C. , 1984 , Prediction of error probabilities for integrated digital synchronizers . IEEE Journal of Solid-state Circuits , 19 , 236 – 244 .
- HORSTMANN , J. U. , EICHEL , H. W. , and COATES , R. L. , 1989 , Metastability behaviour of CMOS ASIC flip-flops in theory and test . IEEE Journal of Solid-state Circuits , 24 , 146 – 157 .
- ICLEEMAN , L. , and CANTONI , A. , 1987 , Metastable behaviour in digital systems . IEEE Design and Test of Computers , 4 , 4 – 19 .
- MORIN , L. , and LI , H. F. , 1989 , Design of synchronizers a review . Proceedings of the Institution of Electrical Engineers , Pt E , 136 , 557 – 564 .
- ROSEMBERG , F. U. , and MOLNAR , C. E. , 1992 , Comments on ‘Metastability of CMOS latch/ flip-flop’ . IEEE Journal of Solid-state Circuits , 27 , 128 – 130 .
- Tel: +(34) 5 423 9923; Fax: +(34) 5 4624506