A global scheduling approach for cycle time control in complex manufacturing systems

References

• Ab Rahim, S. R., I. Ahmad, and M. A. Chik. 2012. “Technique to Improve Visibility for Cycle Time Improvement in Semiconductor Manufacturing.” In 2012 10th IEEE International Conference on Semiconductor Electronics (ICSE), Kuala Lumpur, Malaysia, 627–630. IEEE.
   Google Scholar
• Akcalt, E., K. Nemoto, and R. Uzsoy. 2001. “Cycle-time Improvements for Photolithography Process in Semiconductor Manufacturing.” IEEE Transactions on Semiconductor Manufacturing 14 (1): 48–56.
   Web of Science ®Google Scholar
• Akhavan-Tabatabaei, R., S. Ding, and J. G. Shanthikumar. 2009. “A Method for Cycle Time Estimation of Semiconductor Manufacturing Toolsets with Correlations.” In Winter Simulation Conference, Austin, TX, 1719–1729.
   Google Scholar
• Babbs, D., and R. Gaskins. 2007. “Effectiveness of Small Batch Size on Cycle Time Reduction in a Conventional 300 Mm Factory.” In 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, Stresa, Italy, 105–110. IEEE.
   Google Scholar
• Bang, J.-Y., and Y.-D. Kim. 2010. “Hierarchical Production Planning for Semiconductor Wafer Fabrication Based on Linear Programming and Discrete-event Simulation.” IEEE Transactions on Automation Science and Engineering 7 (2): 326–336.
   Web of Science ®Google Scholar
• Bard, J. F., Y. Deng, R. Chacon, and J. Stuber. 2010. “Midterm Planning to Minimize Deviations From Daily Target Outputs in Semiconductor Manufacturing.” IEEE Transactions on Semiconductor Manufacturing 23 (3): 456–467.
   Web of Science ®Google Scholar
• Barhebwa-Mushamuka, F., S. Dauzère-Pérès, and C. Yugma. 2019a. “Multi-objective Optimization for Work-in-Process Balancing and Throughput Maximization in Global Fab Scheduling.” In 2019 IEEE 15th International Conference on Automation Science and Engineering (CASE), Vancouver, BC, Canada, 697–702. IEEE.
   Google Scholar
• Barhebwa-Mushamuka, F., S. Dauzère-Pérès, and C. Yugma. 2019b. “Work-in-Process Balancing Control in Global Fab Scheduling for Semiconductor Manufacturing.” In 2019 Winter Simulation Conference (WSC), National Harbor, MD, 2257–2268. IEEE.
   Google Scholar
• Barhebwa-Mushamuka, F., S. Dauzère-Pérès, and C. Yugma. 2021. “Push and Time at Operation Strategies for Cycle Time Minimization in Global Fab Scheduling for Semiconductor Manufacturing.” In 2021 IEEE 17th International Conference on Automation Science and Engineering (CASE), Lyon, France, 1309–1314. IEEE.
   Google Scholar
• Bitar, A., S. Dauzère-Pérès, C. Yugma, and R. Roussel. 2016. “A Memetic Algorithm to Solve An Unrelated Parallel Machine Scheduling Problem with Auxiliary Resources in Semiconductor Manufacturing.” Journal of Scheduling 19 (4): 367–376.
   Web of Science ®Google Scholar
• Bonal, J., M. Fernandez, O. Maire-Richard, S. Aparicio, R. Oliva, S. G. B. Gonzalez, L. Rodriguez, M. Rosendo, J. Villacieros, and J. Becerro. 2001. “A Statistical Approach to Cycle Time Management.” In 2001 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, Munich, Germany, 11–15. IEEE.
   Google Scholar
• Borshchev, A. 2013. The Big Book of Simulation Modeling: Multimethod Modeling with AnyLogic 6. Lisle, IL: AnyLogic North America.
   Google Scholar
• Bureau, M., S. Dauzère-Pérès, C. Yugma, and L. Vermarien. 2007. “An Approach for Simulating Consistent Global and Local Scheduling.” In 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, Stresa, Italy, 96–99. IEEE.
   Google Scholar
• Bureau, M., S. Dauzère-Pérès, C. Yugma, L. Vermariën, and J.-B. Maria. 2007. “Simulation Results and Formalism for Global-local Scheduling in Semiconductor Manufacturing Facilities.” In Proceedings of the 2007 Winter Simulation Conference, edited by S. G. Henderson, B. Biller, M.-H. Hsieh, J. Shortle, J. D. Tew, and R. R. Barton, 1768–1773. Washington, DC: Institute of Electrical and Electronics Engineers, Inc.
   Google Scholar
• Chen, T. 2013. “A Systematic Cycle Time Reduction Procedure for Enhancing the Competitiveness and Sustainability of a Semiconductor Manufacturer.” Sustainability 5 (11): 4637–4652.
   Web of Science ®Google Scholar
• Chien, C.-F., C.-Y. Hsu, and C.-W. Hsiao. 2012. “Manufacturing Intelligence to Forecast and Reduce Semiconductor Cycle Time.” Journal of Intelligent Manufacturing 23 (6): 2281–2294.
   Web of Science ®Google Scholar
• Chien, C.-F., and C.-H. Hu. 2006. “Segmented WIP Control for Cycle Time Reduction.” In 2006 IEEE International Symposium on Semiconductor Manufacturing, Tokyo, Japan, 265–268. IEEE.
   Google Scholar
• Chien, C. C., C. Meng, K. L. Chen, and K. T. Hung. 2005. “Cycle Time Learning Curve in Semiconductor Foundry Industry.” In ISSM 2005 IEEE International Symposium on Semiconductor Manufacturing, San Jose, CA, 359–360. IEEE.
   Google Scholar
• Chung, S.-H., and H.-W. Huang. 2002. “Cycle Time Estimation for Wafer Fab with Engineering Lots.” Iie Transactions 34 (2): 105–118.
   Web of Science ®Google Scholar
• Dauzère-Pérès, S., and J.-B. Lasserre. 2002. “On the Importance of Sequencing Decisions in Production Planning and Scheduling.” International Transactions in Operational Research 9 (6): 779–793.
   Google Scholar
• Domaschke, J., S. Brown, J. Robinson, and F. Leibl. 1998. “Effective Implementation of Cycle Time Reduction Strategies for Semiconductor Back-end Manufacturing.” In Proceedings of the 1998 Winter Simulation Conference, Washington, DC, Vol. 2, 985–992. IEEE.
   Google Scholar
• Eberts, D., S. Keil, F. Peipp, and R. Lasch. 2015. “Shortening of Cycle Time in Semiconductor Manufacturing via Meaningful Lot Sizes.” In 2015 26th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), Saratoga Springs, NY, 34–41. IEEE.
   Google Scholar
• El Adl, M., A. A. Rodriguez, and K. S. Tsakalis. 1996. “Hierarchical Modeling and Control of Re-entrant Semiconductor Manufacturing Facilities.” In Proceedings of the 35th IEEE Conference on Decision and Control, Kobe, Japan, Vol. 2, 1736–1742. IEEE.
   Google Scholar
• Ghasemi, A., C. Heavey, and G. Laipple. 2018. “A Review of Simulation-optimization Methods with Applications to Semiconductor Operational Problems.” In 2018 Winter Simulation Conference (WSC), Gothenburg, Sweden, 3672–3683. IEEE.
   Google Scholar
• Govind, N., E. W. Bullock, L. He, B. Iyer, M. Krishna, and C. S. Lockwood. 2008. “Operations Management in Automated Semiconductor Manufacturing with Integrated Targeting, Near Real-time Scheduling, and Dispatching.” IEEE Transactions on Semiconductor Manufacturing 21 (3): 363–370.
   Web of Science ®Google Scholar
• Hassoun, M. 2013. “On Improving the Predictability of Cycle Time in An NVM Fab by Correct Segmentation of the Process.” IEEE Transactions on Semiconductor Manufacturing 26 (4): 613–618.
   Web of Science ®Google Scholar
• Hung, Y.-F., and R. C. Leachman. 1996. “A Production Planning Methodology for Semiconductor Manufacturing Based on Iterative Simulation and Linear Programming Calculations.” IEEE Transactions on Semiconductor Manufacturing 9 (2): 257–269.
   Web of Science ®Google Scholar
• Hwang, T.-K., and S.-C. Chang. 2003. “Design of a Lagrangian Relaxation-based Hierarchical Production Scheduling Environment for Semiconductor Wafer Fabrication.” IEEE Transactions on Robotics and Automation 19 (4): 566–578.
   Google Scholar
• Jung, C., D. Pabst, M. Ham, M. Stehli, and M. Rothe. 2014. “An Effective Problem Decomposition Method for Scheduling of Diffusion Processes Based on Mixed Integer Linear Programming.” IEEE Transactions on Semiconductor Manufacturing 27 (3): 357–363.
   Web of Science ®Google Scholar
• Kao, Y.-T., and S.-C. Chang. 2018. “Setting Daily Production Targets with Novel Approximation of Target Tracking Operations for Semiconductor Manufacturing.” Journal of Manufacturing Systems49:107–120.
   Web of Science ®Google Scholar
• Kim, Y.-D., J.-G. Kim, B. Choi, and H.-U. Kim. 2001. “Production Scheduling in a Semiconductor Wafer Fabrication Facility Producing Multiple Product Types with Distinct Due Dates.” IEEE Transactions on Robotics and Automation 17 (5): 589–598.
   Google Scholar
• Kim, S. H., and Y. H. Lee. 2016. “Synchronized Production Planning and Scheduling in Semiconductor Fabrication.” Computers & Industrial Engineering 96: 72–85.
   Web of Science ®Google Scholar
• Knopp, S., S. Dauzère-Pérès, and C. Yugma. 2017. “A Batch-oblivious Approach for Complex Job-shop Scheduling Problems.” European Journal of Operational Research 263 (1): 50–61.
   Web of Science ®Google Scholar
• Kramer, S. S. 1989. “Total Cycle Time Management by Operational Elements.” In IEEE/SEMI International Semiconductor Manufacturing Science Symposium, Burlingame, CA, 17–20. IEEE.
   Google Scholar
• Kriett, P. O., S. Eirich, and M. Grunow. 2017. “Cycle Time-oriented Mid-term Production Planning for Semiconductor Wafer Fabrication.” International Journal of Production Research 55 (16): 4662–4679.
   Web of Science ®Google Scholar
• Leachman, R. C., and S. Ding. 2010. “Excursion Yield Loss and Cycle Time Reduction in Semiconductor Manufacturing.” IEEE Transactions on Automation Science and Engineering 8 (1): 112–117.
   Web of Science ®Google Scholar
• Leachman, R. C., J. Kang, and V. Lin. 2002. “Slim: Short Cycle Time and Low Inventory in Manufacturing At Samsung Electronics.” Interfaces 32 (1): 61–77.
   Web of Science ®Google Scholar
• Lehmann, C. F. 2012. Strategy and Business Process Management: Techniques for Improving Execution, Adaptability, and Consistency. CRC Press.
   Google Scholar
• Liao, D.-Y., S.-C. Chang, K.-W. Pei, and C.-M. Chang. 1996. “Daily Scheduling for R&D Semiconductor Fabrication.” IEEE Transactions on Semiconductor Manufacturing 9 (4): 550–561.
   Web of Science ®Google Scholar
• Lu, S. C., D. Ramaswamy, and P. Kumar. 1994. “Efficient Scheduling Policies to Reduce Mean and Variance of Cycle-time in Semiconductor Manufacturing Plants.” IEEE Transactions on Semiconductor Manufacturing 7 (3): 374–388.
   Web of Science ®Google Scholar
• Mati, Y., S. Dauzère-Pérès, and C. Lahlou. 2011. “A General Approach for Optimizing Regular Criteria in the Job-shop Scheduling Problem.” European Journal of Operational Research 212 (1): 33–42.
   Web of Science ®Google Scholar
• Meidan, Y., B. Lerner, G. Rabinowitz, and M. Hassoun. 2011. “Cycle-time Key Factor Identification and Prediction in Semiconductor Manufacturing Using Machine Learning and Data Mining.” IEEE Transactions on Semiconductor Manufacturing 24 (2): 237–248.
   Web of Science ®Google Scholar
• Mönch, L., J. W. Fowler, S. Dauzère-Pérès, S. J. Mason, and O. Rose. 2011. “A Survey of Problems, Solution Techniques, and Future Challenges in Scheduling Semiconductor Manufacturing Operations.” Journal of Scheduling 14 (6): 583–599.
   Web of Science ®Google Scholar
• Mönch, L., J. W. Fowler, and S. J. Mason. 2012. Production Planning and Control for Semiconductor Wafer Fabrication Facilities: Modeling, Analysis, and Systems. Vol. 52. Springer Science & Business Media.
   Google Scholar
• Nemoto, K., E. Akcali, and R. M. Uzsoy. 2000. “Quantifying the Benefits of Cycle Time Reduction in Semiconductor Wafer Fabrication.” IEEE Transactions on Electronics Packaging Manufacturing 23 (1): 39–47.
   Web of Science ®Google Scholar
• Qi, C., T. K. Tang, and A. L. Sivakumar. 2002. “Modeling Methodology: Simulation based Cause and Effect Analysis of Cycle Time and WIP in Semiconductor Wafer Fabrication.” In Proceedings of the 34th Conference on Winter Simulation: Exploring New Frontiers. Winter Simulation Conference, San Diego, CA,1423–1430.
   Google Scholar
• Robinson, J. K., et al. 2002. “Understanding and Improving Wafer Fab Cycle Times.” Semiconductor FabTech 17 (April)..
   Google Scholar
• Robinson, J., and F. Chance. 2000. “Wafer Fab Cycle Time Management using MES Data.” In Proceedings of the 2000 Modeling and Analysis for Semiconductor Manufacturing Conference (MASM 2000), Tempe, AZ.
   Google Scholar
• Rozen, K., and N. M. Byrne. 2016. “Using Simulation to Improve Semiconductor Factory Cycle Time by Segregation of Preventive Maintenance Activities.” In Proceedings of the 2016 Winter Simulation Conference, Washington, DC, 2676–2684. IEEE Press.
   Google Scholar
• Sadeghi, R., S. Dauzere-Pérès, and C. Yugma. 2016. “A Multi-method Simulation Modelling for Semiconductor Manufacturing.” IFAC-PapersOnLine 49 (12): 727–732.
   Google Scholar
• Shin, J., D. Grosbard, J. R. Morrison, and A. Kalir. 2019. “Decomposition Without Aggregation for Performance Approximation in Queueing Network Models of Semiconductor Manufacturing.” International Journal of Production Research 57 (22): 7032–7045.
   Web of Science ®Google Scholar
• Simon, D., and C. Schmidt. 2015. Business Architecture Management: Architecting the Business for Consistency and Alignment. Cham: Springer.
   Google Scholar
• Sivakumar, A. I. 2000. “Simulation based Cause and Effect Analysis of Cycle Time Distribution in Semiconductor Backend.” In Proceedings of the 32nd Conference on Winter Simulation. Society for Computer Simulation International, Orlando, FL, 1464–1471.
   Google Scholar
• Swe, A. N., A. K. Gupta, A. I. Sivakumar, and P. Lendermann. 2006. “Cycle Time Reduction at Cluster Tool in Semiconductor Wafer Fabrication.” In 2006 8th Electronics Packaging Technology Conference, Singapore, 671–677. IEEE.
   Google Scholar
• Tai, Y., W. Pearn, and J. Lee. 2012. “Cycle Time Estimation for Semiconductor Final Testing Processes with Weibull-distributed Waiting Time.” International Journal of Production Research 50 (2): 581–592.
   Web of Science ®Google Scholar
• Tirkel, I. 2011. “Cycle Time Prediction in Wafer Fabrication Line by Applying Data Mining Methods.” In 2011 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, Saratoga Springs, NY, 1–5. IEEE.
   Google Scholar
• Tirkel, I., N. Reshef, and G. Rabinowitz. 2009. “In-line Inspection Impact on Cycle Time and Yield.” IEEE Transactions on Semiconductor Manufacturing 22 (4): 491–498.
   Web of Science ®Google Scholar
• Tsakalis, K. S., J. -J. Flores-Godoy, and A. A. Rodriguez. 1997. “Hierarchical Modeling and Control for Re-entrant Semiconductor Fabrication Lines: A Mini-Fab Benchmark.” In 1997 6th International Conference on Emerging Technologies and Factory Automation Proceedings, ETFA'97, Los Angeles, CA, 508–513. IEEE.
   Google Scholar
• Varadarajan, A., and S. C. Sarin. 2006. “A Survey of Dispatching Rules for Operational Control in Wafer Fabrication.” IFAC Proceedings Volumes 39 (3): 715–726.
   Google Scholar
• Vargas-Villamil, F. D., D. E. Rivera, and K. G. Kempf. 2003. “A Hierarchical Approach to Production Control of Reentrant Semiconductor Manufacturing Lines.” IEEE Transactions on Control Systems Technology 11 (4): 578–587.
   Web of Science ®Google Scholar
• Vialletelle, P., and G. France. 2006. “An Overview of An Original WIP Management Framework At a High Volume/high Mix Facility.” IFAC Proceedings Volumes 39 (3): 89–92.
   Google Scholar
• Wang, J., and J. Zhang. 2016. “Big Data Analytics for Forecasting Cycle Time in Semiconductor Wafer Fabrication System.” International Journal of Production Research 54 (23): 7231–7244.
   Web of Science ®Google Scholar
• Wang, J., P. Zheng, and J. Zhang. 2020. “Big Data Analytics for Cycle Time Related Feature Selection in the Semiconductor Wafer Fabrication System.” Computers & Industrial Engineering 143: 106362.
   Web of Science ®Google Scholar
• Wein, L. M. 1992. “On the Relationship Between Yield and Cycle Time in Semiconductor Wafer Fabrication.” IEEE Transactions on Semiconductor Manufacturing 5 (2): 156–158.
   Web of Science ®Google Scholar
• Wu, G.-L., K. Wei, C.-Y. Tsai, S.-C. Chang, N.-J. Wang, R.-L. Tsai, and H.-P. Liu. 1998. “TSS: A Daily Production Target Setting System for Fabs.” In 1998 Semiconductor Manufacturing Technology Workshop (Cat. No. 98EX133), Hsinchu, Taiwan, 86–98. IEEE.
   Google Scholar
• Yugma, C., S. Dauzère-Pérès, C. Artigues, A. Derreumaux, and O. Sibille. 2012. “A Batching and Scheduling Algorithm for the Diffusion Area in Semiconductor Manufacturing.” International Journal of Production Research 50 (8): 2118–2132.
   Web of Science ®Google Scholar
• Zarifoglu, E., J. J. Hasenbein, and E. Kutanoglu. 2012. “Lot Size Management in the Semiconductor Industry: Queueing Analysis for Cycle Time Optimization.” IEEE Transactions on Semiconductor Manufacturing 26 (1): 92–99.
   Web of Science ®Google Scholar