REFERENCES
- Koopmans (T C) & Beckman (M). Assignment Problem and Location of Economic Activities. Echonometrica. 25, 1957; 52–76.
- Kurtzberg (J M). Backboard Wiring Algorithms for the Placement & Connection Order Problems. Rep. TR 60–41, Burroughs, Paoli, Pa, 1960.
- Gilmore (P C). A Solution to the Module Placement Problem. Rep. RC 430, IBM, York Town, Heights, NY, 1961.
- Cooper (J F). Monte Carlo Positioning of Connected Elements on a Carrier, Rep. 64-520-005, IBM Owego, NY, 1964.
- Rutman (R A). An Algorithm for Placement of Interconnected Elements Based on Minimum Wire Length. Proc. 1964, SJCC, P 477–491.
- Kurtzberg (J M). Algorithm for Backplane Foundation. Micro electronics in Large Systems. Spartan Books, Washington DC 1965 P 51–76.
- Hanan (M) & Kurtzberg (J M). Force Vector Placement Technique. Rep. RC 2843, IBM, York Town Heights, NY. 1970.
- Hanan (M) & Kurtzberg (J M). A Review of the Placement and Quadratic Assignment Problems. SIAM Review. 14, 2; 1972; 324–342.
- Sutherland (L E) & Oestreicher (D). How Big Should a Printed Circuit Board be? IEEE Trans. C-22, 1973; 536–541.
- Hope (A K). Applications of Interactive Computer Technique and Graph Theoretic Methods to Printed Wiring Board Design. Computer Aided Design Project Application Report 2. University of Edinburgh, July, 1973.
- Druffel (IE), Schmidh (DC) & Wagner (RA). Simple Efficient Design Automation Processor. Proc 12th Design Automation Conference. June 1975, P 361–368.
- Breuer (M A). Min-cut Placement. Design Automation and Fault Tolerant Computing, 1977, P 343–362.
- Pal Chaudhuri (P). An Ecological Approach to Wire Routing. Proc. IEEE 1979 International Symposium on Circuits and Systems, P 854–857, Tokyo, July, 1979.
- Pal Chaudhuri (P). Hardware Implementation of Computer Logic Circuit. Proc. Symposium on Micro-Mini Computers and Automation. March 28–30, 1979, University of Roorkee.
- Karnighan (B W) & Lin (S). An Efficient Heuristic Procedure for Partitioning Graphs. B.S.T.J. 49, 1970; 291–307.
- Pal Chaudhuri (P). Routing Multilayer Boards on Steiner Metric. Proc. of IEEE 1980 International Symposium on Circuits and Systems, April 28–30, Houston.
- Pal Chaudhuri (P). An Integrated Approach of Partitioning—Placement—Wire routing of Computer Logic Circuit. PhD Dissertation, Department of Electrical Engineering, Indian Institute of Technology, Kharagpur. 1979.