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Original Articles

Some Algorithmic Improvements in Multi-Level Logic Minimisation

& , FIETE
Pages 371-381 | Received 21 Jun 1996, Published online: 26 Mar 2015

REFERENCES

  • R K Brayton & C T McMullen, The decomposition and factorization of boolean expressions, Proc ISCAS Symp, Rome Italy, pp 49–54, 1982.
  • S Y H Su & C W Nam, Computer aided synthesis of multiple output multilevel NAND networks with fan-in and fan-out constraints, IEEE Trans on Computers, vol C-20, pp 1445–1455, 1972.
  • H Mathony & U G Baitinger, CARLOS: An automated multi-level logic design system for CMOS semi-custom integrated circuits, IEEE Trans on Computer Aided Design, vol 7. no 3, pp 346–355, March 1988.
  • D L Dietmeyer & Y H Su, Logic design automation of fanin limited NAND networks, IEEE Trans Computers, vol C-18, pp 11–22, January 1969.

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