Process-Induced Delay Variation in SWCNT, MWCNT, and Mixed CNT Interconnects

REFERENCES

• H. Li, C. Xu, and K. Banerjee, “Carbon nanomaterials: The ideal interconnect technology for next-generation ICs,” IEEE Des. Test Comput., Vol. 27, no. 4, pp. 20–31, 2010.
   Web of Science ®Google Scholar
• A. K. Goel, High-Speed VLSI Interconnections, 2nd ed. Wiley-IEEE Press, New York, NY, 2007.
   Google Scholar
• N. Srivastava, and K. Banerjee, “Interconnect challenges for nanoscale electronic circuits,” TMS J. Mater., Vol. 56, no. 10, pp. 30–31, 2004.
   Google Scholar
• International Technology Roadmap for Semiconductors (ITRS), 2012. Available: www.itrs.net.
   Google Scholar
• S. Im, N. Srivastava, K. Banerjee, and K. E. Goodson, “Scaling analysis of multilevel interconnect temperatures for high performance ICs,” IEEE Trans. Electron. Devices, Vol. 52, no. 12, pp. 2710–9, 2005.
   Web of Science ®Google Scholar
• H. Dadgour, A. M. Cassell, and K. Banerjee, “Scaling and variability analysis of CNT-based NEMS devices and circuits with implications for process design. in Proceedings of IEEE Electron Device Meeting (IEDM '08), San Francisco, CA, 2008, pp. 529–2.
   Google Scholar
• H. Li, C. Xu, N. Srivastava, and K. Banerjee, “Carbon nanomaterials for next-generation interconnects and passives: Physics, status and prospects,” IEEE Trans. Electron. Devices, Vol. 56, no. 9, pp. 1799–1821, 2009.
   Web of Science ®Google Scholar
• L. Zhu, J. Xu, Y. Xiu, Y. Sun, D. W. Hess, and C. P. Wong, “Growth and electrical characterization of high-aspect-ratio carbon nanotube arrays,” Carbon, Vol. 44, no. 2, pp. 253–8, Feb. 2006.
   Web of Science ®Google Scholar
• C. L. Cheung, A. Kurtz, H. Park, and C. M. Lieber, “Diameter-controlled synthesis of carbon nanotubes,” J. Phys. Chem., B, Vol. 106, no. 10, pp. 2429–33, Feb. 2002.
   Web of Science ®Google Scholar
• S. Haruehanroengu, and W. Wang, “Analyzing conductance of mixed carbon nanotube bundles for interconnect application,” IEEE Electron. Device Lett., Vol. 28, no. 8, pp. 756–9, 2007.
   Web of Science ®Google Scholar
• S. Subash, J. Kolar, and M. H. Chowdhury, “A new spatially rearranged bundle of mixed carbon nanotubes as VLSI interconnect,” IEEE Trans. Nanotechnol., Vol. 12, no. 1, pp. 3–12, 2013.
   Web of Science ®Google Scholar
• H. Li, W.-Y. Yin, K. Banerjee, and J.-F. Mao, “Circuit modeling and performance analysis of multi-walled carbon nanotube interconnects,” IEEE Trans. Electron. Devices, Vol. 55, no. 6, pp. 1328–37, 2008.
   Web of Science ®Google Scholar
• S.-N. Pu, W.-Y. Yin, J.-F. Mao, and Q. H. Liu, “Crosstalk prediction of single- and double-walled carbon-nanotube (SWCNT/DWCNT) bundle interconnects,” IEEE Trans. Electron. Devices, Vol. 56, no. 4, pp. 560–8, 2009.
   Web of Science ®Google Scholar
• M. K. Majumder, N. D. Pandya, B. K. Kaushik, and S. K. Manhas, “Analysis of MWCNT and bundled SWCNT interconnects: Impact on crosstalk and area,” IEEE Electron. Devices Lett., Vol. 33, no. 8, pp. 1180–2, 2012.
   Web of Science ®Google Scholar
• A. Naeemi, and J. D. Meindl, “Compact physical models for multiwall carbon nanotube interconnects,” IEEE Electron. Device Lett, Vol. 27, no. 5, pp. 338–40, 2006.
   Web of Science ®Google Scholar
• A. Naeemi, and J. D. Meindl, “Performance modeling for single- and multiwall carbon nanotubes as signal and power interconnects in gigascale systems,” IEEE Trans. Electron. Devices, Vol. 55, no. 10, pp. 2574–82, 2008.
   Web of Science ®Google Scholar
• M. K. Majumder, P. K. Das, and B. K. Kaushik, “Delay and crosstalk reliability issues in mixed MWCNT bundle interconnects,” Microelectron. Reliab., Vol. 54, no. 11, pp. 2570–77, 2014.
   Google Scholar
• M. S. Sarto, and A. Tamburrano, “Single-conductor transmission-line model of multiwall carbon nanotubes,” IEEE Trans. Nanotechnol., Vol. 9, no. 1, pp. 82–92, 2010.
   Web of Science ®Google Scholar
• P. Lamberti, and V. Tuccix, “Impact of the variability of the process parameters on CNT-based nanointerconnects performances: A comparison between SWCNT bundles and MWCNT,” IEEE Trans. Nanotechnol., Vol. 11, no. 5, pp. 924–33, 2012.
   Web of Science ®Google Scholar
• A. Nieuwoudt, and Y. Massoud, “On the impact of process variations for carbon nanotube bundles for VLSI interconnect,” IEEE Trans. Electron. Devices, Vol. 54, no. 3, pp. 446–55, 2007.
   Web of Science ®Google Scholar
• N. R. Kukkam, M. K. Majumder, and B. K. Kaushik, “Delay uncertainty in MLGNR interconnects under process induced variations of width, doping, dielectric thickness and mean free path,” J. Comput. Electron., Vol. 13, no. 3, pp. 639–46, 2014.
   Google Scholar
• J. Kumar, M. K. Majumder, B. K. Kaushik, and S. Dasgupta, “Analysis of crosstalk deviation for bundled MWCNT with process induced height and width variations,” in Proceedings of VLSI Design and Test (VDAT2013), Jaipur, Rajasthan, India, Vol. 382, 2013, pp. 214–22.
   Google Scholar