References
- MacLeod , T. C. , Phillips , T. A. and Ho , F. D. 2008 . Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate Switching Time Analysis . Integrated Ferroelectric , 89 : 180 – 188 .
- MacLeod , T. C. , Phillips , T. A. and Ho , F. D. 2008 . Characterizing an Analog Amplifier Utilizing a Ferroelectric Transistor . Integrated Ferroelectrics , 104 : 40 – 47 .
- Kang , S. M. and Leblebici , Y. 2003 . CMOS Digital Integrated Circuits, Analysis and Design , 3rd Ed , New York : McGraw Hill .
- Grout , I. 2008 . Digital Systems with FPGAs and CPLD , Massachusetts : Newnes .
- Uyemura , J. P. 2001 . CMOS Logic Circuit Design , Massachusetts : Norwell .
- Seager , C. H. , McIntyre , D. , Tuttle , B. A. and Evans , J. 1995 . Mechanisms for the Operation of Thin Film Transistors on Ferroelectric . Integrated Ferroelectrics , 6 : 47 – 68 .
- Evans , J. 1993 . “ NDRO Test Procedure Format, Radiant Technologies ” . Inc. Technical Report #93G