A 17-Level Switched Voltage Source Multi-Level Inverter Topology with Low-Switching Frequency Control

References

• Rodríguez, J., Lai, J.-S., and Peng, F.Z., “Multilevel inverters: A survey of topologies, controls, and applications,” IEEE Trans. Ind. Electr., Vol. 49, No. 4, pp. 724–738, August 2002.
   Web of Science ®Google Scholar
• Laali, S., Abbaszades, K., and Lesani, H., “New hybrid control methods based on multi-carrier PWM techniques and charge balance control methods for cascaded multilevel converters,” Canadian Conference on Electrical and Computer Engineering, pp. 243–246, Niagara Falls, Ontario, Canada, 8–11 May, 2011.
   Google Scholar
• Ding, K., Cheng, K.W. E., and Zou, Y.P., “Analysis, of an asymmetric modulation methods for cascaded multilevel inverters,” IET Power Electron., Vol. 5, No. 1, pp. 74–85, January 2012.
   Web of Science ®Google Scholar
• Napoles, J., Watson, A.J., and Padilla, J.J. “Selective harmonic mitigation technique for cascaded H-bridge converter with non-equal dc link voltages,” IEEE Trans. Ind. Electron., Vol. 60, No. 5, pp. 1963–1971, May 2013.
   Web of Science ®Google Scholar
• Farokhnia, N., Fathi, S.H. , Yousefpoor, N., and Bakhshizadeh, M.K. , “Minimization of total harmonic distortion in a cascaded multilevel inverter by regulating of voltages dc sources,” IET Power Electron., Vol. 5, No. 1, pp. 106–114, January 2012.
   Web of Science ®Google Scholar
• Yu, X., Wang, H., and Khambadkone, A.M., “Control of paralleled PEBB to facilitate the efficient operation of microgrid,” International Symposium on Industrial Electronics, pp. 2217–2222, Bari, Italy, 4–7 July, 2010.
   Google Scholar
• Ye, Z., Jain, P.K., Sen, P.C., “Circulating current minimization in high-frequency ac power distribution architecture with multiple inverter modules operated in parallel,” IEEE Trans. Ind. Electron., Vol. 54, No. 5, pp. 2673–2687, 2007.
   Web of Science ®Google Scholar
• Guerrero, J.M., Matas, J., de Vicuña, L.G., Castilla, M., and Miret, J., “Wireless-control strategy for parallel operation of distributed generation inverters,” IEEE Trans. Ind. Electron., Vol. 53, No. 5, pp. 1461–1470, 2006.
   Web of Science ®Google Scholar
• Romero-Cadaval, E., Milanes-Montero, M.I., Gonzalez-Romera, E., Barrero-Gonzalez, F., “Power injection system for grid-connected photovoltaic generation systems based on two collaborative voltage source inverters,” IEEE Trans. Ind. Electron., Vol. 56, No. 11, pp. 4389–4398, November 2009.
   Web of Science ®Google Scholar
• Turner, R., Walton, S., and Duke, R., “Stability and bandwidth implications of digitally controlled grid-connected parallel inverters,” IEEE Trans. Ind. Electron., Vol. 57, No. 11, pp. 3685–3694, November 2010.
   Web of Science ®Google Scholar
• Ramani, K., and Krishan, A., “New hybrid multilevel inverter fed induction motor drive—A diagnostic study,” Int. Rev. Elect. Eng., Vol. 5, pt. A, No. 6, pp. 2562–2569, December 2010.
   Web of Science ®Google Scholar
• Baker, R.H., “Electric power converter,” U.S. Patent 03-867-643, February 1975.
   Google Scholar
• Malinowski, M., Gopakumar, K., Rodriguez, J., and Perez, M.A., “A survey on cascaded multilevel inverters,” IEEE Trans. Ind. Electron., Vol. 57, No. 7, pp. 2197–2206, July 2010.
   Web of Science ®Google Scholar
• Sepahvand, H., Liao, J., Ferdowsi, M., and Corzine, K.A., “Capacitor voltage regulation in single-DC-source cascaded H-bridge multilevel converters using phase-shift modulation,” IEEE Trans. Ind. Electron., Vol. 60, No. 9, pp. 3619–3626, September 2013.
   Web of Science ®Google Scholar
• McGrath, B.P., Holmes, D.G., and Kong, W.Y., “A decentralized controller architecture for a cascaded H-bridge multilevel converter,” IEEE Trans. Ind. Electron., Vol. 61, No. 3, pp. 1169–1178, March 2014.
   Web of Science ®Google Scholar
• Mihret, M., Odeh, C., Angirekula, B.N. V., and Ojo, O., “Optimal Synthesis of output voltage waveforms for multilevel cascaded single phase DC-AC converters,” Proceedings of the IEEE Applied Power Electronics Conference and Exposition, pp. 2690–2697, Long Beach California, CA, 17–22 March, 2013.
   Google Scholar
• Baker, R.H., “High-voltage converter circuit,” U.S. Patent 04–203151, May 1980.
   Google Scholar
• Nabae, A., Takahashi, I., and Akagi, H., “A new neutral-point clamped PWM inverter,” Proceedings of the Industry Application Society Conference, pp. 761–766, Cincinnati, OH, 28 September–3 October, 1980.
   Google Scholar
• Nabae, A., Takahashi, I., and Akagi, H., “A new neutral-point clamped PWM inverter,” IEEE Trans. Ind. Appl., Vol. IA-17, pp. 518–523, September/October 1981.
   Web of Science ®Google Scholar
• J. Rodriguez, Bernet, S., Steimer, P.K., and Lizama, I.E., “A survey on neutral-point-clamped inverters,” IEEE Trans. Ind. Electron., Vol. 57, No. 7, pp. 2219–2230, July 2010.
   Web of Science ®Google Scholar
• Meynard, T.A., and Foch, H., “Multi-level conversion: high-voltage chopper and voltage source inverters,” Conference Record of the 1992 IEEE Power Electronics Specialists Conference (PESC), pp. 397–403, Toledo, Spain, 29 June–3 July
   Google Scholar
• Peng, F.Z., “A generalized multilevel inverter topology with self-voltage balancing,” IEEE Trans. Ind. Appl., Vol. 37, No. 2, pp. 611–618, 2001.
   Web of Science ®Google Scholar
• Khoucha, F., Lagoun, S.M., Marouani, K., Kheloui, A., and El Hachemi Benbouzid, M., “Hybrid cascaded H-bridge multilevel-inverter induction motor-drive direct torque control for automotive applications,” IEEE Trans. Ind. Electron., Vol. 57, No. 3, pp. 892–899, March 2010.
   Web of Science ®Google Scholar
• Mathew, J., Rajeevan, P.P., Mathew, K., Azeez, N.A., and Gopakumar, K., “A multilevel inverter scheme with dodecagonal voltage space vectors based on flying capacitor topology for induction motor drives,” IEEE Trans. Power Electron., Vol. 28, No. 1, pp. 516–525, January 2013.
   Web of Science ®Google Scholar
• Peng, F.Z., Liu, Y., Yang, S., Zhang, S., Gunasekaran, D., and Karki, U., “Transformer-less unified power flow controller using the cascade multilevel inverter,” IEEE Trans. Power Electron., Vol. 31, No. 8, pp. 5461–5472, August 2016.
   Web of Science ®Google Scholar
• Adam, G.P., Finney, S.J., Massoud, A.M., and Williams, B.W., “Capacitor balance issues of the diode-clamped multilevel inverter operated in a quasi two-state mode,” IEEE Trans. Ind. Electron., Vol. 55, No. 8, pp. 3088–3099, August 2008.
   Web of Science ®Google Scholar
• Shu, Z., Ding, N., Chen, J., Zhu, H., and He, X., “Multilevel SVPWM with DC-link capacitor voltage balancing control for diode-clamped multilevel converter based STATCOM,” IEEE Trans. Ind. Electron., Vol. 60, No. 5, pp. 1884–1896, May 2013.
   Web of Science ®Google Scholar
• Fazel, S.S., Bernet, S., Krug, D., and Jalili, K., “Design and comparison of 4-kv neutral-point-clamped, flying-capacitor, and series connected H-bridge multilevel converters,” IEEE Trans. Ind. Appl., Vol. 43, No. 4, pp. 1032–1040, August 2007.
   Web of Science ®Google Scholar
• Pereda, J., and Dixon, J., “Cascaded multilevel converters: Optimal asymmetries and floating capacitor control,” IEEE Trans. Ind. Electron., Vol. 60, No. 11, pp. 4784–4793, November 2013.
   Web of Science ®Google Scholar
• Rahim, N.A., Elias, M.F. M., and Hew, W.P., “Transistor-clamped H-bridge based cascaded multilevel inverter with new method of capacitor voltage balancing,” IEEE Trans. Ind. Electron., Vol. 60, No. 8, pp. 2943–2956, August 2013.
   Web of Science ®Google Scholar
• Manjrekar, M., Steimer, P., and Lipo, T., “Hybrid multilevel power conversion system: a competitive solution for high-power applications,” IEEE Trans. Ind. Appl., Vol. 36, No. 3, pp. 834–841, May/June 2000.
   Web of Science ®Google Scholar
• Hinago, Y., and Koizumi, H., “A single-phase multilevel inverter using switched series/parallel dc voltage sources,” IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2643–2650, August 2010.
   Web of Science ®Google Scholar
• Waltrich, G., and Barbi, I., “Three-phase cascaded multilevel inverter using power cells with two inverter legs in series,” IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2605–2612, August 2010.
   Web of Science ®Google Scholar
• Babaei, E., Farhadi Kangarlu, M., and Najaty Mazgar, F., “Symmetric and asymmetric multilevel Inverter topologies with reduced switching devices,” Electr. Power Syst. Res., Vol. 86, pp. 122–130, May 2012.
   Web of Science ®Google Scholar
• Kangarlu, M.F., and Babaei, E., “A generalized cascaded multilevel inverter using series connection of sub-multilevel inverters,” IEEE Trans. Power Electron., Vol. 28, No. 2, pp. 625–636, February 2013.
   Web of Science ®Google Scholar
• Alishah, R.S., Nazarpour, D., Hosseini, S.H., and Sabahi, M., “Novel topologies for symmetric, asymmetric, and cascade switched-diode multilevel converter with minimum number of power electronic components.” IEEE Trans. Ind. Electron., Vol. 61, No. 10, pp. 5300–5310, October 2014.
   Web of Science ®Google Scholar
• Alishah, R.S., Nazarpour, D., Hosseini, S.H. , and Sabahi, M., “Novel multilevel inverter topologies for medium and high-voltage applications with lower values of blocked voltage by switches,” IET Power Electron., Vol. 7, No. 12, pp. 3062–3071, December 2014.
   Web of Science ®Google Scholar
• Alishah, R.S., Barzegar, M., and Nazarpour, D., “A new cascade boost inverter for photovoltaic applications with minimum number of elements.” Int. Trans. Electr. Energy Sys., Vol. 25, No. 7, pp. 1241–1256, July 2015.
   Web of Science ®Google Scholar
• Ebrahimi, J., Babaei, E., and Gharehpetian, G.B., “A new multilevel converter topology with reduced number of power electronic components,” IEEE Trans. Ind. Electron., Vol. 59, No. 2, pp. 655–667, February 2012.
   Web of Science ®Google Scholar
• Gupta, K.K., Jain, S., “Topology for multilevel inverters to attain maximum number of levels from given DC sources,” IET Power Electr., Vol. 5, No. 4, pp. 435–446, April 2012.
   Web of Science ®Google Scholar
• Khosroshahi, M.T., “Crisscross cascade-multi-cell multilevel inverter with reduction in number of components,” IET Power Electr., Vol. 7, No. 12, pp. 2914–2924, December 2014.
   Web of Science ®Google Scholar
• Ajami, A., Mokhberdoran, A., Van den Bossche, A., “Developed cascade-multi-cell multilevel inverter topology to minimise the number of circuit devices and voltage stresses of switches,” IET Power Electr., Vol. 7, No. 2, pp. 459–466, February 2014.
   Web of Science ®Google Scholar
• Ajami, A., Toupchi Khosroshahi, M., Jannati Oskuee, M.R., Mokhberdoran, A., “Cascade-multi-cell multilevel converter with reduced number of switches,” IET Power Electr., Vol. 7, No. 3, pp. 552–558, March 2014.
   Web of Science ®Google Scholar
• Babaei, E., Hosseini, S.H., Gharehpetian, G.B., TarafdarHaque, M., and Sabahi, M., “Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology,” Electr. Power Syst. Res., Vol. 77, No. 8, pp. 1073–1085, June 2007.
   Web of Science ®Google Scholar
• Khoshkbar Sadigh, A., Abarzadeh, M., Corzine, K.A., and Dargahi, V., “A new breed of optimized symmetrical and asymmetrical cascaded multilevel power converters,” IEEE J. Emerging Selected Topics Power Electr., Vol. 3, No. 4, pp. 1160–1170, December 2015.
   Web of Science ®Google Scholar
• Park, S.-J., Kang, F.-S., Lee, M.H., Kim, C.-U., “A new single-phase, five-level PWM inverter employing a deadbeat control scheme,” IEEE Trans. Power Electr., Vol. 18, No. 3, pp. 831–843, May 2003.
   Web of Science ®Google Scholar
• Odeh, C.I., and Nnadi, D.B., “Single-phase, 17-level hybridized cascaded multi-level inverter” Elec. Power Comp. Syst., Vol. 41, No. 2, pp. 182–196, January 2013.
   Web of Science ®Google Scholar
• Odeh, C.I., Nnadi, D.B., and Obe, E.S., “Three-phase, five-level multi-level inverter topology,” Elec. Power Comp. Syst., Vol. 40, No. 13, pp. 1522–1532, September 2012.
   Web of Science ®Google Scholar
• Alilu, S., Babaei, E., and Mozafari, S.B., “A new general topology for multilevel inverters based on developed H-bridge,” Proceedings of the Power Electronics, Drive Systems & Technologies Conference (PEDSTC), pp. IR-113–IR-118, Tehran, Iran, 13–14 February, 2013.
   Google Scholar
• Babaei, E., Alilu, S., and Laali, S., “A new general topology for cascaded multilevel inverters with reduced number of components based on developed H–bridge,” IEEE Trans. Ind. Electr., Vol. 61, No. 8, pp. 3932–3939, August 2014.
   Web of Science ®Google Scholar
• Babaei, E., Laali, S., and Alilu, S., “Cascaded multilevel inverter with series connection of novel H–bridge basic units,” IEEE Trans. Ind. Electr., Vol. 61, No. 12, pp. 6664–6671, December 2014.
   Web of Science ®Google Scholar
• Babaei, E., and Laali, S., “Optimum structures of proposed new cascaded multilevel inverter with reduced number of components,” IEEE Trans. Ind. Electr., Vol. 62, No. 11, pp. 6887–6895, November 2015.
   Web of Science ®Google Scholar
• Babaei, E., Laali, S., and Bayat, Z., “A single-phase cascaded multilevel inverter based on a new basic unit with reduced number of power switches,” IEEE Trans. Ind. Electr., Vol. 62, No. 2, pp. 922–929, February 2015.
   Web of Science ®Google Scholar
• Odeh, C.I., Obe, E.S., and Ojo, O., “Topology for cascaded multilevel inverter,” IET Power Electr., Vol. 9, No. 5, pp. 921–929, April 2016.
   Web of Science ®Google Scholar
• Vahedi, H., Labbé, P.-A., and Al-Haddad, K., “Sensor-less five-level packed U-Cell (PUC5) inverter operating in stand-alone and grid-connected modes,” IEEE Trans. on Ind. Informatics, Vol. 12, No. 1, pp. 361–370, February 2016.
   Web of Science ®Google Scholar
• Vahedi, H., and Al-Haddad, K., “Real-time implementation of a seven-level packed U-cell inverter with a low-switching-frequency voltage regulator,” IEEE Trans. Power Electr., Vol. 31, No. 8, pp. 5963–5973, August 2016.
   Web of Science ®Google Scholar
• Vahedi, H., Al-Haddad, K., Ounejjar, Y., and Addoweesh, K., “Crossover switches cell (CSC): A new multilevel inverter topology with maximum voltage levels and minimum DC sources,” Proceedings of the Industrial Electronics Society, IECON, pp. 54–59, Vienna Austria, 10–13 November, 2013.
   Google Scholar
• Oh, W.-S., Han, S.-K., Choi, S.-W., and Moon, G.-W., “A three phase three-level PWM switched voltage source inverter with zero neutral point potential,” J. Power Electr., Vol. 5, No. 3, pp. 224–232, July 2005.
   Google Scholar
• Odeh, C.I., “Improved three-phase, five-level pulse-width modulation switched voltage source inverter,” IET Power Electr., Vol. 8, No. 4, pp. 524–535, April 2015.
   Web of Science ®Google Scholar
• Li, L., Czarkowski, D., Yaguang, L., and Pillay, P., “Multilevel selective harmonic elimination PWM technique in series-connected voltage inverters,” IEEE Trans. Ind. Appl., Vol. 36, No. 1, pp. 160–170, January/February 2000.
   Web of Science ®Google Scholar
• Mohamed, S., Dahidah, A., Konstantinou, G., and Agelidis, V.G., “Review of multilevel SHE PWM: Formulations, solving algorithms, implementation and applications,” IEEE Trans. Power Electr., Vol. 30, No. 8, pp. 4091–4106, August 2015.
   Web of Science ®Google Scholar
• Napoles, J., Watson, A.J., Padilla, J.J., Leon, J.I., L. Franquelo, G., Wheeler, P.W., and Aguirre, M.A., “Selective harmonic mitigation technique for cascaded H-bridge converters with non-equal DC link voltages,” IEEE Trans. Ind. Electr., Vol. 60, No. 5, pp. 1963–1971, May 2013.
   Web of Science ®Google Scholar
• Dahidah, M.S. A., and Agelidis, V.G., “A hybrid genetic algorithm for selective harmonic elimination control of a multilevel inverter with non-equal DC sources,” Proceedings of the IEEE International Conference on Power Electronics and Drives Systems, pp. 1205–1210, Kuala Lumpur Malaysia, 28 November–1 December, 2005.
   Google Scholar
• El-Bakry, M., “Selective harmonics minimization for multilevel inverters,” Proceedings of the IEEE International Conference on Computer and Electrical Engineering, pp. 341–346, Dubai, UAE, 28–30 December, 2009.
   Google Scholar
• Hagh, M.T., Taghizadeh, H., and Razi, K., “Harmonic minimization in multilevel inverters using modified species-based particle swarm optimization,” IEEE Trans. Power Electr., Vol. 24, No. 10, pp. 2259–2267, October 2009.
   Web of Science ®Google Scholar
• Naderi, Y., Hosseini, S.H., Mahari, A., and Naderi, R., “A new strategy for harmonic minimization based on triple switching of multilevel converters,” Proceedings of the IEEE Iranian Conference on Electrical Engineering (ICEE), pp. 1–6, Ferdowsi University of Mashhad, Iran, 14–16 May, 2013.
   Google Scholar
• Sahali, Y., and Fellah, M.K., “Application of the optimal minimization of the THD technique to the multilevel symmetrical inverters and study of its performance in comparison with the selective harmonic elimination technique,” Proceedings of the IEEE International Symposium on Power Electronics, Electrical Drives, Automation and Motion (SPEEDAM), pp. 1342–1348, Taormina, Italy, 23–26 May, 2006.
   Google Scholar
• Sharifzadeh, M., Sheikholeslami, A., Vahedi, H., Ghoreishy, H., Labbé, P.-A., and Al-Haddad, K., “Optimised harmonic elimination modulation extended to four-leg neutral-point-clamped inverter,” IET Power Electr., Vol. 9, No. 3, pp. 441–448, March 2016.
   Web of Science ®Google Scholar
• Sharifzadeh, M., Vahedi, H., Sheikholeslami, A., Labbé, P.-A., and Al-Haddad, K., “Hybrid SHM–SHE modulation technique for a four-leg NPC inverter with DC capacitor self-voltage balancing,” IEEE Trans. Ind. Electr., Vol. 62, No. 8, pp. 4890–4899, August 2015.
   Web of Science ®Google Scholar
• Dahidah, M. S. A., and Agelidis, V.G., “Selective harmonic elimination PWM control for cascaded multilevel voltage source converters: A generalized formula,” IEEE Trans. on Power Electr., Vol. 23, No. 4, pp. 1620–1630, July 2008.
   Google Scholar
• Farokhnia, N., Fathi, S.H., Salehi, R., Gharehpetian, G.B., and Ehsani, M., “Improved selective harmonic elimination pulse-width modulation strategy in multilevel inverters,”IET Power Electr., Vol. 5, No. 9, pp. 1904–1911, November 2012.
   Web of Science ®Google Scholar