Implementation of a noise-coexistence threshold logic architecture on a GaAs-based nanowire FET network

References

• V. Balasubramanian, Heterogeneity and efficiency in the brain, Proc. IEEE 103 (2015 Aug), pp. 1346–1358.10.1109/JPROC.2015.2447016
   Web of Science ®Google Scholar
• R. Benzi, Stochastic resonance: from climate to biology, Nonlin. Process. Geophys. 17 (2010), pp. 431–441.10.5194/npg-17-431-2010
   Web of Science ®Google Scholar
• A.D. Bulsara, A. Dari, W.L. Ditto, K. Murali, and S. Sinha, Logical stochastic resonance, Chem. Phys. 375 (2010), pp. 424–434.10.1016/j.chemphys.2010.06.015
   Web of Science ®Google Scholar
• L. Gammaitoni, P. Hanggi, P. Jung, and F. Marchesoni, Stochastic resonance, Rev. Mod. Phys. 70 (1998), pp. 223–287.10.1103/RevModPhys.70.223
   Web of Science ®Google Scholar
• Z. Gingl, R. Vajitai, and L.B. Kish, Signal-to-noise ratio gain by stochastic resonance in a bistable system, Chaos Soliton. Fract. 11 (2000), pp. 1929–1932.10.1016/S0960-0779(99)00131-9
   Web of Science ®Google Scholar
• D. Hampel and R.O. Winder, Threshold logic, IEEE Spectrum. 8 (1971 May), pp. 32–39.10.1109/MSPEC.1971.5218091
   Web of Science ®Google Scholar
• S.L. Hurst, An introduction to threshold logic: a survey of present theory and practice, Radio Electron. Eng. 37 (1969), pp. 339–351.10.1049/ree.1969.0062
   Google Scholar
• S. Kasai and T. Asai, Stochastic resonance in Schottky wrap gate-controlled GaAs nanowire field-effect transistors and their networks, Appl. Phys. Expr. 1 (2008 Jul), pp. 083001.1–3.
   Web of Science ®Google Scholar
• S. Kasai and H. Hasegawa, A single electron binary-decision-diagram quantum logic circuit based on Schottky wrap gate control of a GaAs nanowire hexagon [letter], IEEE Electr. Device Lett. 23 (2002), pp. 446–448.10.1109/LED.2002.801291
   Web of Science ®Google Scholar
• S. Kasai, T. Nakamura, and Y. Shiratori, Multipath-switching device utilizing a GaAs-based multiterminal nanowire junction with size-controlled dual Schottky wrap gates [letter], Appl. Phys. Lett. 90 (2007), p. 203504.10.1063/1.2739085
   Web of Science ®Google Scholar
• S. Kasai, K. Miura, and Y. Shiratori, Threshold-variation-enhanced adaptability of response in a nanowire field-effect transistor network [letter], Appl. Phys. Lett. 96(19) (2010 May), pp. 194102–194104.10.1063/1.3428784
   Web of Science ®Google Scholar
• R. Kuroda and S. Kasai, GaAs nanowire FET-integrated threshold logic circuit, Proceedings of the 22nd International Workshop on Post-Binary ULSI Systems, 2013 May 21; Toyama International Conference Center, Toyama, Japan.
   Google Scholar
• C. Mead, Neuromorphic electronic systems, Proc. IEEE 78 (1990 Oct), pp. 1629–1636.10.1109/5.58356
   Web of Science ®Google Scholar
• K. Murali, S. Sinha, W.L. Ditto, and A.R. Bulsara, Reliable logic circuit elements that exploit nonlinearity in the presence of a noise floor [letter], Phys. Rev. Lett. 102 (2009), pp. 104101–104104.10.1103/PhysRevLett.102.104101
   PubMed Web of Science ®Google Scholar
• A.R. Shaharin Fadzli, D. Nakata, Y. Shiratori, and S. Kasai, Boolean logic gates utilizing GaAs three branch nanowire junctions controlled by Schottky wrap gates, Jpn. J. Appl. Phys. 48 (2009), p. 06FD01.
   Web of Science ®Google Scholar
• H. Shibata, Y. Shiratori, and S. Kasai, Novel nanowire-based flip-flop circuit utilizing gate-controlled GaAs three-branch nanowire junctions, Jpn. J. Appl. Phys. 50 (2011), p. 06GF03.10.7567/JJAP.50.06GF03
   Google Scholar
• Y. Shiratori, K. Miura, R. Jia, N.J. Wu, and S. Kasai, Compact reconfigurable binary-decision-diagram logic circuit on a GaAs nanowire network, Appl. Phys. Expr. 3 (2010), p. 025002.10.1143/APEX.3.025002
   Google Scholar
• Y. Shiratori, K. Miura, and S. Kasai, Programmable nano-switch array using SiN/GaAs interface traps on a GaAs nanowire network for reconfigurable BDD logic circuits, Microelectr. Eng. 88 (2011), pp. 2755–2758.10.1016/j.mee.2010.12.007
   Web of Science ®Google Scholar
• H.Q. Zhao, T. Nakamura, S. Kasai, T. Hashizume, and N.J.Wu, Fabrication and characterization of active and sequential circuits utilizing Schottky-wrap-gate-controlled GaAs hexagonal nanowire network structures. IEICE Trans. Electron. E91-C (2008), pp. 1063–1069.10.1093/ietele/e91-c.7.1063
   Web of Science ®Google Scholar
• H.Q. Zhao, S. Kasai, Y. Shiratori, and T. Hashizume, A binary-decision-diagram-based two-bit arithmetic logic unit on a GaAs-based regular nanowire network with hexagonal topology, Nanotechnology 20 (2009), p. 245203.10.1088/0957-4484/20/24/245203
   PubMed Web of Science ®Google Scholar