313
Views
4
CrossRef citations to date
0
Altmetric
Article

Integrating content-based image retrieval and deep learning to improve wafer bin map defect patterns classification

ORCID Icon, &
Pages 614-628 | Received 03 Aug 2021, Accepted 01 May 2022, Published online: 19 May 2022

References

  • Chien C-F, Hsu S-C, Chen Y-J. A system for online detection and classification of wafer bin map defect patterns for manufacturing intelligence. Int J P Res. 2013;51(8):2324–2338.
  • Chiu M-C, Chiou J-Y. Technical service platform planning based on a company’s competitive advantage and future market trends: a case study of an IC foundry. Comput Ind Eng. 2016;99:503–517.
  • Tseng M-L, Tran TPT, Ha HM, et al. Sustainable industrial and operation engineering trends and challenges Toward Industry 4.0: a data driven analysis. J Ind Prod Eng. 2021;1–18. DOI:10.1080/21681015.2021.1950227
  • Chien C-F, Hsu C-Y. UNISON analysis to model and reduce step-and-scan overlay errors for semiconductor manufacturing. J Intell Manuf. 2011;22(3):399–412.
  • Fan S-KS, Lin S-C, Tsai P-F. Wafer fault detection and key step identification for semiconductor manufacturing using principal component analysis, AdaBoost and decision tree. J Ind Prod Eng. 2016;33(3):151–168.
  • Kang S, Cho S, An D, et al. Using wafer map features to better predict die-level failures in final test. IEEE Trans Semicond Manuf. 2015;28(3):431–437.
  • Chen Y-J, Lin T-H, Chang K-H, et al. Feature extraction for defect classification and yield enhancement in color filter and micro-lens manufacturing: an empirical study. J Ind Prod Eng. 2013;30(8):510–517.
  • Hansen C, Thyregod P. Use of wafer maps in integrated circuit manufacturing. Microelectron Reliab. 1998;38(6–8):1155–1164.
  • Park S, Jang J, Kim CO. Discriminative feature learning and cluster-based defect label reconstruction for reducing uncertainty in wafer bin map labels. J Intell Manuf. 2021;32(1):251–263.
  • Hsu C-Y, Chen W-J, Chien J-C. Similarity matching of wafer bin maps for manufacturing intelligence to empower Industry 3.5 for semiconductor manufacturing. Comput Ind Eng. 2020;142:106358.
  • Wu M-J, Jang J-SR, Chen J-L. Wafer map failure pattern recognition and similarity ranking for large-scale data sets. IEEE Trans Semicond Manuf. 2014;28(1):1–12.
  • Murphy BT. Cost-size optima of monolithic integrated circuits. Proc IEEE. 1964;52(12):1537–1545.
  • Stapper CH, Armstrong FM, Saji K. Integrated circuit yield statistics. Proc IEEE. 1983;71(4):453–470.
  • Sikka D (1993). Automated feature detection and characterization in sort wafer maps. Paper presented at the Proceedings of 1993 International Conference on Neural Networks (IJCNN-93-Nagoya, Japan).
  • Cunningham SP, Mackinnon S. Statistical methods for visual defect metrology. IEEE Trans Semicond Manuf. 1998;11(1):48–53.
  • Jeong Y-S, Kim S-J, Jeong MK. Automatic identification of defect patterns in semiconductor wafer maps using spatial correlogram and dynamic time warping. IEEE Trans Semicond Manuf. 2008;21(4):625–637.
  • Chien C-F, Hsu C-Y, Chang K-H. Overall wafer effectiveness (OWE): a novel industry standard for semiconductor ecosystem as a whole. Comput Ind Eng. 2013;65(1):117–127.
  • Hwang JY, Kuo W. Model-based clustering for integrated circuit yield enhancement. Eur J Oper Res. 2007;178(1):143–153.
  • Wang C-H. Recognition of semiconductor defect patterns using spatial filtering and spectral clustering. Expert Syst Appl. 2008;34(3):1914–1923.
  • Yuan T, Kuo W, Bae SJ. Detection of spatial defect patterns generated in semiconductor fabrication processes. IEEE Trans Semicond Manuf. 2011;24(3):392–403.
  • Taha K, Salah K, Yoo PD. Clustering the dominant defective patterns in semiconductor wafer maps. IEEE Trans Semicond Manuf. 2017;31(1):156–165.
  • Jin CH, Na HJ, Piao M, et al. A novel DBSCAN-based defect pattern detection and classification framework for wafer bin map. IEEE Trans Semicond Manuf. 2019;32(3):286–292.
  • Chen F-L, Liu S-F. A neural-network approach to recognize defect spatial pattern in semiconductor fabrication. IEEE Trans Semicond Manuf. 2000;13(3):366–373.
  • Chien C-F, Lin T-H, Liu Q-W, et al. Developing a data mining method for wafer binmap clustering and an empirical study in a semiconductor manufacturing fab. J Chin Inst Ind Eng. 2002;19(2):23–38.
  • Di Palma F, De Nicolao G, Miraglia G, et al. Unsupervised spatial pattern classification of electrical-wafer-sorting maps in semiconductor manufacturing. Pattern Recognit Lett. 2005;26(12):1857–1865.
  • Li T-S, Huang C-L. Defect spatial pattern recognition using a hybrid SOM–SVM approach in semiconductor manufacturing. Expert Syst Appl. 2009;36(1):374–385.
  • Nakata K, Orihara R, Mizuoka Y, et al. A comprehensive big-data-based monitoring system for yield enhancement in semiconductor manufacturing. IEEE Trans Semicond Manuf. 2017;30(4):339–344.
  • Yang Y-F (2019). A deep learning model for identification of defect patterns in semiconductor wafer map. Paper presented at the 2019 30th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) Saratoga Springs, New York, USAhttps://www.proceedings.com/48934.html.
  • Nakazawa T, Kulkarni DV. Anomaly detection and segmentation for wafer defect patterns using deep convolutional encoder–decoder neural network architectures in semiconductor manufacturing. IEEE Trans Semicond Manuf. 2019;32(2):250–256.
  • Hsu C-Y, Chien J-C. Ensemble convolutional neural networks with weighted majority for wafer bin map pattern classification. J Intell Manuf. 2020 33 ;1–14 https://link.springer.com/article/10.1007/s10845-020-01687-7.
  • Ojala T, Pietikäinen M, Harwood D. A comparative study of texture measures with classification based on featured distributions. Pattern Recogn. 1996;29(1):51–59.
  • Leung T, Malik J. Representing and recognizing the visual appearance of materials using three-dimensional textons. Int J Comput Vis. 2001;43(1):29–44.
  • Belongie S, Malik J, Puzicha J. Shape matching and object recognition using shape contexts. IEEE Trans Pattern Anal Mach Intell. 2002;24(4):509–522.
  • Swain MJ, Ballard DH. Color indexing. Int J Comput Vis. 1991;7(1):11–32.
  • Lowe G. Sift-the scale invariant feature transform. Int J. 2004;2(91–110):2.
  • Dalal N, Triggs B (2005). Histograms of oriented gradients for human detection. Paper presented at the 2005 IEEE computer society conference on computer vision and pattern recognition San Diego, CA, USA ( CVPR’05).https://ieeexplore.ieee.org/document/1467409
  • Bosch A, Zisserman A, Munoz X (2007). Representing shape with a spatial pyramid kernel. Paper presented at the Proceedings of the 6th ACM international conference on Image and video retrieval Amsterdam The Netherlands. https://dl.acm.org/doi/proceedings/10.1145/1282280
  • Bay H, Ess A, Tuytelaars T, et al. Speeded-up robust features (SURF). Comput Vision Image Understanding. 2008;110(3):346–359.
  • Atlam HF, Attiya G, El-Fishawy N. Integration of color and texture features in CBIR system. Int J Comput Appl. 2017;164(3):23–29.
  • Ceylan D, Dang M, Mitra NJ, et al. (2017). Discovering structured variations via template matching. Paper presented at the Computer Graphics Forum.
  • Zernike F, Stratton FJM. Diffraction theory of the knife-edge test and its improved form, the phase-contrast method. Mon Not R Astron Soc. 1934;94(5):377–384.
  • Teague MR. Image analysis via the general theory of moments. J Opt Soc Am. 1980;70(8):920–930.
  • Chen Z, Sun SK. A Zernike moment phase-based descriptor for local image representation and matching. IEEE Trans Image Process. 2009;19(1):205–219.
  • Jang J-SR (2017 Accessed 31 July 2022). WM-811K (LSWMD) in MIR Lab. Accessed 31 July 2022. http://mirlab.org/dataSet/public/
  • Nakazawa T, Kulkarni DV. Wafer map defect pattern classification and image retrieval using convolutional neural network. IEEE Trans Semicond Manuf. 2018;31(2):309–314.
  • Szegedy C, Vanhoucke V, Ioffe S, et al. (2016). Rethinking the inception architecture for computer vision. In Proceedings of the IEEE conference on computer vision and pattern recognition. Las Vegas, NV, USA (pp. 2818–2826). https://www.computer.org/csdl/proceedings/cvpr/2016/12OmNqH9hnp
  • Chiu M-C, Chen T-M. Applying data augmentation and mask R-CNN-based instance segmentation method for mixed-type wafer maps defect patterns classification. IEEE Trans Semicond Manuf. 2021;34(4):455–463.
  • Piao M, Jin CH, Lee JY, et al. Decision tree ensemble-based wafer map failure pattern recognition based on radon transform-based features. IEEE Trans Semicond Manuf. 2018;31(2):250–257.

Reprints and Corporate Permissions

Please note: Selecting permissions does not provide access to the full text of the article, please see our help page How do I view content?

To request a reprint or corporate permissions for this article, please click on the relevant link below:

Academic Permissions

Please note: Selecting permissions does not provide access to the full text of the article, please see our help page How do I view content?

Obtain permissions instantly via Rightslink by clicking on the button below:

If you are unable to obtain permissions via Rightslink, please complete and submit this Permissions form. For more information, please visit our Permissions help page.